From patchwork Mon Jan 14 13:24:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 155474 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3656693jaa; Mon, 14 Jan 2019 05:26:50 -0800 (PST) X-Google-Smtp-Source: ALg8bN6/GSABwofTqJPeoG8PzGLl5LBFO5Fci2nhi2IDNfefqyo2j/M4WCFpBCT0AkPkih0XRpu4 X-Received: by 2002:a62:8d4f:: with SMTP id z76mr26123747pfd.2.1547472410377; Mon, 14 Jan 2019 05:26:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547472410; cv=none; d=google.com; s=arc-20160816; b=XC+GAqQxSkvD5Re1UTE4OpJUrWsdb90usCVeHLrbyJe125nuw8yY50yW+XytKJg82D 7W7l6cLnRuLLtqnDCrRLo+9Ki7gDU9T6uAxdilD8D+nWR17vW56wiH3L1Ue9/hbfCpVC iJzm4PnyAX0hzpDvG65h/Cg/5nEi7F7sZPvTBQc17sjU1vjHyXbCV3DQJ/p8fWRuzm9P sosgvrhQm449VA0KNuj4UboWODxI0+SJZwhTfz1uYeu1iUTRjMyHJazwbabMYW73fuGr QLNMXhK7zXr38gJjf9ffF/cevdSG6jbK0ahZslgNXNAp4DmJjplmZW8GwYf8jIt4S6eJ ocXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=JBZ+KApRI2tD19Gjs/0efSSSLgbMPMBQuRhTfDhOm2w=; b=Wb03Ml14/mwso1tpK/7KzEBhnACRm3HTUR39LIQlj3QbzV/m+ToIsp1hAWHRg3xAjd XtxOSbJqNcBs4i+eGmU4QXV9LGGy562cqL2rG0jmLQFEi4Cz6Toye3euLeBKoSgbUl/F oEp3hvFnpOt6C5suMLzIxYp56IT7fh5oAJaJ0EpUx6/cRY1flqPN1POiJlZ0rTp9+1tW dUH0KhUIE1ArfsqZohjYhMR6vi/4oGDc9mJJD/sjPZmV9zfJpGXhK2f/kYD5FMjCsoOF 3WNN9URD1yGpV/s+3PlwzI0R79uMWYWB/kdQw/dmennTCsXlvxC+XS8NPJprPKIFjdb0 lqXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=az+c5PAy; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o13si319419pgp.540.2019.01.14.05.26.50; Mon, 14 Jan 2019 05:26:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=az+c5PAy; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726652AbfANN0s (ORCPT + 7 others); Mon, 14 Jan 2019 08:26:48 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:37462 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726899AbfANN0s (ORCPT ); Mon, 14 Jan 2019 08:26:48 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0EDQEa8098245; Mon, 14 Jan 2019 07:26:14 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547472374; bh=JBZ+KApRI2tD19Gjs/0efSSSLgbMPMBQuRhTfDhOm2w=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=az+c5PAyuQYI/R4OJ6Yb4NImGUbk5jupD15MptWEu+9jq8Vjepl8fvI5GhZ1VDFtN 0JBWxlxcCdNaFAo0lsw1aXpSFqGOMvp4NY2uqZGX2+fQHS3qFXPyDTuI4BO1JRlt9B ieAwuUla1SUZN6P/xy1KzbzAtIDHBP37WeZD57bc= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0EDQExh057326 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 14 Jan 2019 07:26:14 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 14 Jan 2019 07:26:13 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 14 Jan 2019 07:26:12 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0EDOoWc028516; Mon, 14 Jan 2019 07:26:09 -0600 From: Kishon Vijay Abraham I To: Gustavo Pimentel , Rob Herring , Lorenzo Pieralisi CC: Kishon Vijay Abraham I , Jingoo Han , Bjorn Helgaas , Mark Rutland , Arnd Bergmann , Greg Kroah-Hartman , Murali Karicheri , Jesper Nilsson , , , , , , Subject: [PATCH 16/24] PCI: endpoint: Add support to allocate aligned buffers to be mapped in BARs Date: Mon, 14 Jan 2019 18:54:16 +0530 Message-ID: <20190114132424.6445-17-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190114132424.6445-1-kishon@ti.com> References: <20190114132424.6445-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Modify pci_epf_alloc_space API to take alignment size as argument in order to argument in order to allocate aligned buffers to be mapped to BARs. Add 'align' parameter to epc_features which can be used by platform drivers to specifiy the BAR allocation alignment requirements and use this while invoking pci_epf_alloc_space. This is mainly required for Synopsys Designware PCIe core which masks the lower bits based on the BAR size (See "I/O and MEM Match Modes" section in DesignWare Cores PCI Express Controller Databook version 4.90a). Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/endpoint/functions/pci-epf-test.c | 5 +++-- drivers/pci/endpoint/pci-epf-core.c | 10 ++++++++-- include/linux/pci-epc.h | 2 ++ include/linux/pci-epf.h | 3 ++- 4 files changed, 15 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 2e0fb231ce0c..faffae2551ed 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -438,7 +438,7 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf) epc_features = epf_test->epc_features; base = pci_epf_alloc_space(epf, sizeof(struct pci_epf_test_reg), - test_reg_bar); + test_reg_bar, epc_features->align); if (!base) { dev_err(dev, "Failed to allocated register space\n"); return -ENOMEM; @@ -453,7 +453,8 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf) if (!!(epc_features->reserved_bar & (1 << bar))) continue; - base = pci_epf_alloc_space(epf, bar_size[bar], bar); + base = pci_epf_alloc_space(epf, bar_size[bar], bar, + epc_features->align); if (!base) dev_err(dev, "Failed to allocate space for BAR%d\n", bar); diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c index 8bfdcd291196..fb1306de8f40 100644 --- a/drivers/pci/endpoint/pci-epf-core.c +++ b/drivers/pci/endpoint/pci-epf-core.c @@ -109,10 +109,12 @@ EXPORT_SYMBOL_GPL(pci_epf_free_space); * pci_epf_alloc_space() - allocate memory for the PCI EPF register space * @size: the size of the memory that has to be allocated * @bar: the BAR number corresponding to the allocated register space + * @align: alignment size for the allocation region * * Invoke to allocate memory for the PCI EPF register space. */ -void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar) +void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar, + size_t align) { void *space; struct device *dev = epf->epc->dev.parent; @@ -120,7 +122,11 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar) if (size < 128) size = 128; - size = roundup_pow_of_two(size); + + if (align) + size = ALIGN(size, align); + else + size = roundup_pow_of_two(size); space = dma_alloc_coherent(dev, size, &phys_addr, GFP_KERNEL); if (!space) { diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index c3ffa3917f88..f641badc2c61 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -109,6 +109,7 @@ struct pci_epc { * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs * @bar_fixed_size: Array specifying the size supported by each BAR + * @align: alignment size required for BAR buffer allocation */ struct pci_epc_features { unsigned int linkup_notifier : 1; @@ -117,6 +118,7 @@ struct pci_epc_features { u8 reserved_bar; u8 bar_fixed_64bit; u64 bar_fixed_size[BAR_5 + 1]; + size_t align; }; #define to_pci_epc(device) container_of((device), struct pci_epc, dev) diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index ec02f58758c8..2d6f07556682 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -149,7 +149,8 @@ void pci_epf_destroy(struct pci_epf *epf); int __pci_epf_register_driver(struct pci_epf_driver *driver, struct module *owner); void pci_epf_unregister_driver(struct pci_epf_driver *driver); -void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar); +void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar, + size_t align); void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar); int pci_epf_bind(struct pci_epf *epf); void pci_epf_unbind(struct pci_epf *epf);