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[209.132.180.67]) by mx.google.com with ESMTP id n81-v6si16137819pfk.277.2018.06.19.02.55.14; Tue, 19 Jun 2018 02:55:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="a7X/4YQi"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756931AbeFSJzM (ORCPT + 5 others); Tue, 19 Jun 2018 05:55:12 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:40815 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756382AbeFSJzK (ORCPT ); Tue, 19 Jun 2018 05:55:10 -0400 Received: by mail-pl0-f66.google.com with SMTP id t12-v6so10664869plo.7 for ; Tue, 19 Jun 2018 02:55:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CnSy/kO71XHt4vBwBXiUfk+jIrW8H4VtHcwbkY2pyjk=; b=a7X/4YQi66o7AdO0gVfOwwCLl71qyiT2HBptq2NN86E7P+uhb/P888m/zqFw8UqCdm 9PMWfUiYQFxWflpZmRxxEK9eCuIUraBcFHMA3BaBma+wIC9oQM1a84hYRD5pFAeX1eT5 /mtHJkAWXAJfVVEWk3GIUHr5xAg9ib/gG6jUQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CnSy/kO71XHt4vBwBXiUfk+jIrW8H4VtHcwbkY2pyjk=; b=jEQcBHkKJXuDufnuqFqjnWzxFDVFWNyRSZSJ3PChCalnVwPVhu9cOBi574uWc8IkTS xb5O/Q4MFngwFStEG/riidH3phzm/Wrf6+/mkAxAR9+jNoHOZYIZIB3+pCty957BYl4Z diEs0aLtyzrWj+KIbbEgQRjFlTc/A906/vjjDU9y+a5DQcg4yA2tcgtaF4A5suXzKrEv ymnUJZTLOD6hwS9TZJJtvRI1PjGm+ZRopqdp3H8+L0WJkh/wf5ux+5j1V50YQdPiO73T PVLPbuO3XLMZKvxg48FMuvUa2MpwHQ6rKIpv8kOvFZT+hftTZ0bhzH0vsG25fS0cVFjL +kVg== X-Gm-Message-State: APt69E1eN2QYDiN/wt7OeayDho2rSiavMTY2/RIHtmFaGkLvlSRM5PU6 zbYIarNVEo3sWQzLsAJ1wNK1gQ== X-Received: by 2002:a17:902:b216:: with SMTP id t22-v6mr18147390plr.199.1529402109867; Tue, 19 Jun 2018 02:55:09 -0700 (PDT) Received: from localhost.localdomain ([106.200.222.147]) by smtp.gmail.com with ESMTPSA id c17-v6sm21182034pgw.11.2018.06.19.02.55.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Jun 2018 02:55:09 -0700 (PDT) From: Vinod Koul X-Google-Original-From: Vinod Koul To: linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Matt Mackall , Herbert Xu , Arnd Bergmann , Greg Kroah-Hartman , linux-arm-msm@vger.kernel.org, Stephen Boyd , vinod.koul@linaro.org, Vinod Koul , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: rng: Add new compatible qcom,prng-v2 Date: Tue, 19 Jun 2018 15:24:29 +0530 Message-Id: <20180619095430.26358-2-vkoul@kernel.org> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180619095430.26358-1-vkoul@kernel.org> References: <20180619095430.26358-1-vkoul@kernel.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Later qcom chips support v2 of the prng, so add new compatible qcom,prng-v2 for this. Signed-off-by: Vinod Koul --- Cc: Rob Herring Cc: devicetree@vger.kernel.org Documentation/devicetree/bindings/rng/qcom,prng.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.14.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt index 8e5853c2879b..03fd218bd21a 100644 --- a/Documentation/devicetree/bindings/rng/qcom,prng.txt +++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt @@ -2,7 +2,8 @@ Qualcomm MSM pseudo random number generator. Required properties: -- compatible : should be "qcom,prng" +- compatible : should be "qcom,prng" for 8916 etc + : should be "qcom,prng-v2" for 8996 and later - reg : specifies base physical address and size of the registers map - clocks : phandle to clock-controller plus clock-specifier pair - clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block