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[209.132.180.67]) by mx.google.com with ESMTP id 87-v6si11285723pfo.137.2018.05.19.22.18.58; Sat, 19 May 2018 22:18:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=bsG8XnYa; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751408AbeETFS4 (ORCPT + 5 others); Sun, 20 May 2018 01:18:56 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:33990 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751348AbeETFSw (ORCPT ); Sun, 20 May 2018 01:18:52 -0400 Received: by mail-pf0-f196.google.com with SMTP id a14-v6so5546721pfi.1 for ; Sat, 19 May 2018 22:18:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NRRET1a774IOfwV6KycY0/gxdu703500H+0h/6Ji0oc=; b=bsG8XnYaATFivCyxcJvJzHjUffyIjX+5yv+ItXW+i/JavrARlVTcGQbztGj9wn4zjC NlIIkTeZAP5/cse5Lt8Fh99gZSyhmdDpsG5j/4A9FeHwdK6T+4Z5Xu0SINv2+FLUAVqB naos1g/s1ALHHRuf2nlgRuBzYyk0mSk8J+ZQE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NRRET1a774IOfwV6KycY0/gxdu703500H+0h/6Ji0oc=; b=tsmiUb/3wIyqZcTSQ7vEf3xwLvWoUf/4Cv2rLkMBTm8UCkr+EaRnA9PVeVQVqRVVap 3SiMEIPlVdB5xcaeP4mGIyi9FmhV4P86YCLvPIpC8jvwVtmURDLCEFK0OrktrFF1s2Cc aINOn4TrW/j+pW+NJOkNmLXOJIbFmXvREammCTl6GdlbGNSHZNEEfQO8QS4bo2SJE5nD xftCJjc8hXyFNLa8STOUmtCcdx0hRbA9SKhM8aRtq+6XL3hQYMTG+6tYDk7pK/VqrEM+ m8O0R+NZ/JBOYuUMb7Pi5vNkvGDnquSb18OdeT0vYJiWlIpIZgN6g0Tr0rN+UttxSWOR x36g== X-Gm-Message-State: ALKqPwcA+acE0z1+vDas+gqGTMMnWib1VFVQGaih8JPamqUzzcDL/N0l o5Xjaf/6Glxl1r+WFc1WISCt X-Received: by 2002:a62:9099:: with SMTP id q25-v6mr15599153pfk.66.1526793531435; Sat, 19 May 2018 22:18:51 -0700 (PDT) Received: from localhost.localdomain ([2405:204:718a:6d36:c501:566:93b3:ade2]) by smtp.gmail.com with ESMTPSA id p6-v6sm20107670pfg.157.2018.05.19.22.18.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 19 May 2018 22:18:51 -0700 (PDT) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, Manivannan Sadhasivam Subject: [PATCH v2 1/5] dt-bindings: pinctrl: Add gpio bindings for Actions S900 SoC Date: Sun, 20 May 2018 10:47:32 +0530 Message-Id: <20180520051736.4842-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180520051736.4842-1-manivannan.sadhasivam@linaro.org> References: <20180520051736.4842-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add gpio bindings for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/pinctrl/actions,s900-pinctrl.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt index fb87c7d74f2e..8fb5a53775e8 100644 --- a/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt @@ -8,6 +8,17 @@ Required Properties: - reg: Should contain the register base address and size of the pin controller. - clocks: phandle of the clock feeding the pin controller +- gpio-controller: Marks the device node as a GPIO controller. +- gpio-ranges: Specifies the mapping between gpio controller and + pin-controller pins. +- #gpio-cells: Should be two. The first cell is the gpio pin number + and the second cell is used for optional parameters. +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt. Shall be set to 2. The first cell + defines the interrupt number, the second encodes + the trigger flags described in + bindings/interrupt-controller/interrupts.txt Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices, including the meaning of the @@ -164,6 +175,11 @@ Example: compatible = "actions,s900-pinctrl"; reg = <0x0 0xe01b0000 0x0 0x1000>; clocks = <&cmu CLK_GPIO>; + gpio-controller; + gpio-ranges = <&pinctrl 0 0 146>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; uart2-default: uart2-default { pinmux {