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[209.132.180.67]) by mx.google.com with ESMTP id b21si1170965pfn.18.2018.03.17.03.11.38; Sat, 17 Mar 2018 03:11:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=auQqkdn0; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752568AbeCQKLh (ORCPT + 6 others); Sat, 17 Mar 2018 06:11:37 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:34895 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752368AbeCQKLZ (ORCPT ); Sat, 17 Mar 2018 06:11:25 -0400 Received: by mail-pf0-f193.google.com with SMTP id y186so5159537pfb.2 for ; Sat, 17 Mar 2018 03:11:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LnvVZPRURX9Gme+QX470aYmHcqJ19kBDdz1oGQSy80Q=; b=auQqkdn00pPCXCykuJS9YzXp4obi1K3vYzMhmytnjMf/u6QYUhG7BMsDjuI6cibMaz UPuOoJYgh05DAAAcZ89Rt24vvgW+nu5l7KrE+q64XGklaC7oi/4Hv50jjHgjT3oaktUQ swS/p3SoNiy1zvDYYMumclSkezTKD97+cxtAQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LnvVZPRURX9Gme+QX470aYmHcqJ19kBDdz1oGQSy80Q=; b=MA+x15HTi0/HaErMXNAaJpuQIdYxTRc3BKp4t5tw6Oh3etAT/bhT4qaAAcJ5E1djAG rg19EjozH6guPsAJ7H3D4A0lxVHqQ0itgNFu8MGHod9ioDUwmtd1Oi0QjnznD7+Sec0/ nvjxR5DbWFCjT//vtqJnp4ky23MGknECVQX/iwyMFKBfzuyamc/68Vur5fTYBwtUEFiG jOuYhHzndaSoorMlWY/tYuQ95zYQjOT/h7PAs/yufQnb2RKEJOLF5pp7MVc4DSidaHoN o1Qtk3c9yubw1N8KbI/+f4ONeXowlNT2uxOvtyMI+B6D718rFjnaJkrDlaFbrv9cwUy5 drqA== X-Gm-Message-State: AElRT7Flcw5y4PwTyA9DMaEIRFLAPrLRyc5lXLrUO3jcaEmaXioE3iGZ WRRjYqkJIaJgUhlI1Fp4Mtx6 X-Received: by 10.101.87.138 with SMTP id b10mr4032351pgr.241.1521281484885; Sat, 17 Mar 2018 03:11:24 -0700 (PDT) Received: from mani-Aspire-E5-573.domain.name ([171.49.203.57]) by smtp.gmail.com with ESMTPSA id i27sm3771625pfj.123.2018.03.17.03.11.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Mar 2018 03:11:24 -0700 (PDT) From: Manivannan Sadhasivam To: mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org, mark.rutland@arm.com Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, davem@davemloft.net, mchehab@kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, viresh.kumar@linaro.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, manivannanece23@gmail.com, Manivannan Sadhasivam Subject: [PATCH v5 03/12] arm64: dts: actions: Source CMU clock for UART5 Date: Sat, 17 Mar 2018 15:39:43 +0530 Message-Id: <20180317100952.28538-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180317100952.28538-1-manivannan.sadhasivam@linaro.org> References: <20180317100952.28538-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove fixed clock and source CMU (Clock Management Unit) clock for UART5 driver in Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts index 21ca80f9941c..ff043c961d75 100644 --- a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts +++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts @@ -24,12 +24,6 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; - - uart5_clk: uart5-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &timer { @@ -38,5 +32,5 @@ &uart5 { status = "okay"; - clocks = <&uart5_clk>; + clocks = <&cmu CLK_UART5>; };