From patchwork Mon Feb 5 12:50:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 126850 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1942189ljc; Mon, 5 Feb 2018 04:51:52 -0800 (PST) X-Google-Smtp-Source: AH8x224ucUxrir7RvO+NRpk6dl1XtRqudrH92zgFO1HlMB7IJwA2rgouxXsVSNzEZByf5j9lkFlX X-Received: by 10.98.200.22 with SMTP id z22mr7229590pff.228.1517835112301; Mon, 05 Feb 2018 04:51:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517835112; cv=none; d=google.com; s=arc-20160816; b=G+L25opjak5aV8wzNSjr6vBgg+HLfQLKbqxLkvIBIUhMssvxI/fJaBKb0+QdcxWZYf eRqZ9Axnr6bTELg7IadWcv0co6zoIE9eBn2GTTclCJhtN7xs9d60OoG5tzgEdfUYICjS JnWuwuQ+ozwk3eVd2BTHQc64hZycsYKkB3gII7PuEpIMpTd+OQXO1XtQ5w/x4qsx2Y/5 NshxTEkDr1hF30T188x694o17NnCN89rJm/9up4KrpuHFGGgwA3NTujpkzS2pnEkmgWr WU4ruJJrHkmwcG9ulcXQ7vW/LMBMGcmyvH4PpQDgNg3zNs9DQGgqLJPgbYxgzVDyyfOf u1zA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=vo+iv08s2lyFVEpmogZJUJJ7yg5we0Y2f1ZpAnxMACw=; b=VAdtMw5yK27+N8DpFtOBKKxPIjfXYKFnwDeUTa9XOMyxfptawX0toTMqMXjiQlk+M5 3Jsn+SDwI2R/7yWLXodMcrWZyZ+KpEHuj4EicWVUTG9nWyJFyu/Vp8Dt8wMk0zXW7AL7 4F9sc/yJfln1FOXz5/EYkjHWxhfPTtoA6tFoSMEa8FWHiobqUf6aCAzHbqniGvCSsFRm p86x/Y8zLunmjaW99kMCAijZzQsN0qaJfC3FHj9umKlrzfpDZrrPj35J62pNutfVXh9L G7s52kFbQabCNmST/7JgZ+4zm0zOSe9RcpbDJTL5xwifJDR6CF5S7uhk258stkkdRrzb +r9Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=uEKAYEP9; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=QUARANTINE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j11si4433170pff.406.2018.02.05.04.51.52; Mon, 05 Feb 2018 04:51:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=uEKAYEP9; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=QUARANTINE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753101AbeBEMvt (ORCPT + 6 others); Mon, 5 Feb 2018 07:51:49 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:11512 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753067AbeBEMvm (ORCPT ); Mon, 5 Feb 2018 07:51:42 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w15CoxCk004216; Mon, 5 Feb 2018 06:50:59 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1517835059; bh=a6mkMxLqdU09lZ0a9Lr3oNCSf8P4DB2J51ezSl6Qpus=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=uEKAYEP9P9gSa+8yppPhrqixzPimzRANyaf2Nogpjmybc1pMdrtSP9mpBQ4jfXkXA dYmhW36niFPaEtwOFEhWFlCeP7sVjA0FRAvuNCcg0ReUBFnVEcpiqor3JUSndvk5zm HSd9XIiYN0a6qrjKF8mCTkrJ3qYJZTva1W1+OtJ0= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w15Coxrf006790; Mon, 5 Feb 2018 06:50:59 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Mon, 5 Feb 2018 06:50:58 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Mon, 5 Feb 2018 06:50:58 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w15CoaGa023963; Mon, 5 Feb 2018 06:50:55 -0600 From: Kishon Vijay Abraham I To: Ulf Hansson , Tony Lindgren , Adrian Hunter CC: Rob Herring , Mark Rutland , Russell King , Kishon Vijay Abraham I , , , , , Subject: [PATCH v2 05/16] mmc: sdhci-omap: Workaround for Errata i802 Date: Mon, 5 Feb 2018 18:20:18 +0530 Message-ID: <20180205125029.21570-6-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180205125029.21570-1-kishon@ti.com> References: <20180205125029.21570-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Errata i802 in AM572x Sitara Processors Silicon Revision 2.0, 1.1 (SPRZ429K July 2014–Revised March 2017 [1]) mentions DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure and it has to be disabled during the tuning procedure Implement workaround for Errata i802 here.. [1] -> http://www.ti.com/lit/er/sprz429k/sprz429k.pdf Signed-off-by: Kishon Vijay Abraham I Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-omap.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c index 36e0626d3de2..e24ae903f7ba 100644 --- a/drivers/mmc/host/sdhci-omap.c +++ b/drivers/mmc/host/sdhci-omap.c @@ -257,6 +257,7 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) u32 start_window = 0, max_window = 0; u8 cur_match, prev_match = 0; u32 length = 0, max_len = 0; + u32 ier = host->ier; u32 phase_delay = 0; int ret = 0; u32 reg; @@ -277,6 +278,16 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) reg |= DLL_SWT; sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); + /* + * OMAP5/DRA74X/DRA72x Errata i802: + * DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur + * during the tuning procedure. So disable it during the + * tuning procedure. + */ + ier &= ~SDHCI_INT_DATA_CRC; + sdhci_writel(host, ier, SDHCI_INT_ENABLE); + sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); + while (phase_delay <= MAX_PHASE_DELAY) { sdhci_omap_set_dll(omap_host, phase_delay); @@ -322,6 +333,8 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) ret: sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); + sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); return ret; }