From patchwork Thu Dec 14 16:09:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 121988 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp7006562qgn; Thu, 14 Dec 2017 08:11:58 -0800 (PST) X-Google-Smtp-Source: ACJfBosUpvXzXUbpfLLCGD/PHryJEVXllQvSzFJcbgLLKFFsvMgvYfHN8uoCBKCnFht2h/cPqTLS X-Received: by 10.84.143.34 with SMTP id 31mr10171234ply.446.1513267918311; Thu, 14 Dec 2017 08:11:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513267918; cv=none; d=google.com; s=arc-20160816; b=mE7thARRwJPPeTs3KAhYjn/eiB2DoE8Mi3tZPsorZEBFzjMW69us7fqetuZMFC1NWk /SOUPs2luKEhUBIcU27hms537v90angE6DU4p8Dpukmyznhwd+YGFX5gTD3dkS3w0ZRr lrdjwScUohRveW93PKVN1kL1FqMH2i9N7kD7H+xnQMnmbykQ5g8lxYW0tOdy+B6qNunN jc8+AhcymxthVUy0CvNh/0Ku6k5ArNF5gRlCBjV0VN34EB+UKrnOeWh5Ic/LDeJt03V8 ay2FN89kl5xKXgoVue/g2/1PyeOFhkHMWmcPedNesjHTImIGTlXm71ZCh0JEO8Tmfa6S LNZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=2rE1v53jSjRHG2d8/HS8CQDTRSOMsN4koEGweZZaVXU=; b=Gkfibo9PPhf9wDyhO2f56jXutlVENQDFOAYfwKwymUk2UzelNXTV83FjSE46MKvhm5 Oev9QwlbtOr/2S+J5H3ivLV6RhEESQuJtyB0cpljHxFwK7/xK4xeN71uKy+4CyT680/R Eyd4qiFMydzrWAMMm2OOHWZ59ngMPsrPz8u5bGRodBzIbrDWJTTBY+U+2esNrlUVbA+k TSWzmGNKgFzcdcYBfLYHTS7RpHmdAaD+myJl8cFTTGCh/zfugssyVBZgXOdLMMHpIL0X kM+mh82qqfppPMUcQlr3qqM2H0slqKlG//VEuX5W7fqiQ06eKLnwpmPovAyJV2+vZFfA Tdgg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w88si3480079pfj.200.2017.12.14.08.11.58; Thu, 14 Dec 2017 08:11:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753330AbdLNQL4 (ORCPT + 6 others); Thu, 14 Dec 2017 11:11:56 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:2685 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753313AbdLNQLv (ORCPT ); Thu, 14 Dec 2017 11:11:51 -0500 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 2411994671BCE; Fri, 15 Dec 2017 00:11:38 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.361.1; Fri, 15 Dec 2017 00:11:31 +0800 From: Shameer Kolothum To: , , , CC: , , , , , , , , , Shameer Kolothum Subject: [PATCH v12 2/3] iommu/dma: Add HW MSI(GICv3 ITS) address regions reservation Date: Thu, 14 Dec 2017 16:09:56 +0000 Message-ID: <20171214160957.13716-3-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20171214160957.13716-1-shameerali.kolothum.thodi@huawei.com> References: <20171214160957.13716-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Modified iommu_dma_get_resv_regions() to include GICv3 ITS region on ACPI based ARM platfiorms which may require HW MSI reservations. Signed-off-by: Shameer Kolothum Reviewed-by: Robin Murphy --- drivers/iommu/dma-iommu.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 25914d3..f05f3cf 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -19,6 +19,7 @@ * along with this program. If not, see . */ +#include #include #include #include @@ -167,13 +168,18 @@ void iommu_put_dma_cookie(struct iommu_domain *domain) * * IOMMU drivers can use this to implement their .get_resv_regions callback * for general non-IOMMU-specific reservations. Currently, this covers host - * bridge windows for PCI devices. + * bridge windows for PCI devices and GICv3 ITS region reservation on ACPI + * based ARM platforms that may require HW MSI reservation. */ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) { struct pci_host_bridge *bridge; struct resource_entry *window; + if (!is_of_node(dev->iommu_fwspec->iommu_fwnode) && + iort_iommu_msi_get_resv_regions(dev, list) < 0) + return; + if (!dev_is_pci(dev)) return;