From patchwork Wed Dec 13 11:58:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 121735 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5374212qgn; Wed, 13 Dec 2017 04:01:26 -0800 (PST) X-Google-Smtp-Source: ACJfBoskVK6vPlEQyLWiMBS+y2dZ89GyMtQ3YzOxwE+lRmh/pWFx3HZpgfOVfBjmO60kjuRMROZC X-Received: by 10.84.160.203 with SMTP id v11mr1144702plg.412.1513166486664; Wed, 13 Dec 2017 04:01:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513166486; cv=none; d=google.com; s=arc-20160816; b=jUuOFY8Xg0CGwBItyIk3nReSQKqslYtiHlF1NenXoCFFjJZJ0a/v8VJpYf2VTLiloa I46K4BMvrFaNmFgTi/0KQ7t6Y0C31ntrTyy7+2DoC/gmfE51yAyDtVzlB/fSEQo9IXWi XzCVvucDUsg5JcuU2sR/V45UFMoYNjnDJ5iF5Ji01tUz+YWDyC9cYb78Iu9QmQSNG02m r/UVksCG2Atbs7dQ+MTUf+7VynOkCAu3YbLcdkB1S8zLEoRXNTUvEdpHwkf1K8kxgDAY tTbbXwtx17SfvFsjWJfhzpvEEswmm7ZiWbD6DTOz9kVTQAzP1fTYvCGg9Smeu5gj/ITv 9wYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=2rE1v53jSjRHG2d8/HS8CQDTRSOMsN4koEGweZZaVXU=; b=zhthRVA1RJjUbpIYS4gobgPwMXNn3sp/S1s9mwxwIZsM7ClEl6HOm06hnNzxsqtNHA OqM/rgEtVlO9q3Z3w/UeWpPgjnhtIwNGFTmRfRiT8Dw+59S5TmLfLQ5OKAPl3uYTjZQo yQk7raQkBXp0tOtA77HKI75Zf37mSKBWPvoX7Adm5QNByNk69Ir5500SfhbYUKFfgxbe /NXF1IWs+mPIWztml+szx8jzDkTN7bXYCXag2GAR0Y7z3lnRdbnJIZB+On9Avcw+4Hpt V+4SfJlr6QeR3TEaCSrjQfCB4N561pQBpI6LtOvuxQ4W+fG7QQ+8i/bnqfRgj6jSRUb3 lOXA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t8si1285240pfh.310.2017.12.13.04.01.26; Wed, 13 Dec 2017 04:01:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752102AbdLMMBZ (ORCPT + 6 others); Wed, 13 Dec 2017 07:01:25 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:11936 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752615AbdLMMBY (ORCPT ); Wed, 13 Dec 2017 07:01:24 -0500 Received: from 172.30.72.58 (EHLO DGGEMS404-HUB.china.huawei.com) ([172.30.72.58]) by dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DLZ73422; Wed, 13 Dec 2017 20:00:44 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.361.1; Wed, 13 Dec 2017 20:00:35 +0800 From: Shameer Kolothum To: , , , CC: , , , , , , , , , Shameer Kolothum Subject: [PATCH v11 2/3] iommu/dma: Add HW MSI(GICv3 ITS) address regions reservation Date: Wed, 13 Dec 2017 11:58:29 +0000 Message-ID: <20171213115830.61872-3-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20171213115830.61872-1-shameerali.kolothum.thodi@huawei.com> References: <20171213115830.61872-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090202.5A31166D.002A, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: bf9e012efee82bf44054aeadb1435a7d Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Modified iommu_dma_get_resv_regions() to include GICv3 ITS region on ACPI based ARM platfiorms which may require HW MSI reservations. Signed-off-by: Shameer Kolothum Reviewed-by: Robin Murphy --- drivers/iommu/dma-iommu.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 25914d3..f05f3cf 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -19,6 +19,7 @@ * along with this program. If not, see . */ +#include #include #include #include @@ -167,13 +168,18 @@ void iommu_put_dma_cookie(struct iommu_domain *domain) * * IOMMU drivers can use this to implement their .get_resv_regions callback * for general non-IOMMU-specific reservations. Currently, this covers host - * bridge windows for PCI devices. + * bridge windows for PCI devices and GICv3 ITS region reservation on ACPI + * based ARM platforms that may require HW MSI reservation. */ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) { struct pci_host_bridge *bridge; struct resource_entry *window; + if (!is_of_node(dev->iommu_fwspec->iommu_fwnode) && + iort_iommu_msi_get_resv_regions(dev, list) < 0) + return; + if (!dev_is_pci(dev)) return;