From patchwork Mon Nov 6 11:40:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 118021 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp2665886qgn; Mon, 6 Nov 2017 03:41:05 -0800 (PST) X-Google-Smtp-Source: ABhQp+RkwERVgV7UjyBb2wfvU1gcwORrx6LWoTUzDvJpw4Ko3uTw2n/XHFhhq3oQ5CWxO5SAUQiM X-Received: by 10.98.200.138 with SMTP id i10mr16556686pfk.222.1509968465417; Mon, 06 Nov 2017 03:41:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1509968465; cv=none; d=google.com; s=arc-20160816; b=HFXHUX0eItfMYdnQgUZw0gZ3x7cctoJh9KSw/Ps8ZvyPAVowL0grLMh/M2Pu+0dcKo VtH83KKayou84MTx2y7a797HfETamBT21jV6DAP7ezOGIxfHZPhjMSggz1Bw3uu6UuU4 EF1/7HBXvcQb2iNTkZdqCEwWrxqqH2VORzsGEAeLQc9mpma3CTPKJ/USkQCPwLBCJC6A 4G6pIH9l0EFE47ewGAIBQS3KToPiLZzbeEok/h0EVjsRIdpC+3+ABi/YVfSCitM2S5DF ryYH1SrPwLYkYP3sUGzoMpcGJex3LDXneGLsEjnS46L+gPU2u9Mp8YSeN1fgX9vkUp9/ d7iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=EJNR1tXvFdldj8hKjs7cE9GjEF2DcxKs9fjg3F4Pfm0=; b=YbJ1iFy4y9kpv1ABlYorZJOFBzrfT/75Zo0lE3moIWbb19/W/cP4azGg/9DJO0829S OOA6fWZBGYk742xkOJggALD+lXG7zEeTbTrHhnUpTDDWFLglTN17WqZ10AnQxvCSBRq4 noVlEJvFycKfsAnfEZb8WmtRwzBDSOHNe5xHsMgHLWTJQzqeYQcNZc1DltKP7y2WxBfV bUXnRe4i9Mn1vTEI743JHsvOpD/tdDEXknjRrtWALsAIyFjuxtuCspTORBVN86l0U/iQ 1qftW0I/bWV8NZv34Sosi1AbV1ROF64OyjlQAkvi/jxvAKe5gXkVW8fzH+uCi/Takd/2 e2vw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=icAs1+ow; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s5si11324393pgq.419.2017.11.06.03.41.05; Mon, 06 Nov 2017 03:41:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=icAs1+ow; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752306AbdKFLlE (ORCPT + 6 others); Mon, 6 Nov 2017 06:41:04 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:53783 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752093AbdKFLlD (ORCPT ); Mon, 6 Nov 2017 06:41:03 -0500 Received: by mail-wm0-f67.google.com with SMTP id r196so13564761wmf.2 for ; Mon, 06 Nov 2017 03:41:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=J+Vtb0YOow/ag2z+HJxA1whuzd5sb/mJ4xmuKOSPC7Q=; b=icAs1+owF8q1KF/BgGaIb4iKYhYqK/AZTuB911X5b+Wu7dWn8nAcQyyB/BHdpaIpx3 KYkRf5qfnop4IE0y9cuOjM1G4dkEEp5pOWg/OX0KoVJQlOQH46xdUYbtJcz6pFIBMbRl pScxXOIo+yelYUOHzLlDiknNYUleJc6evI/+4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=J+Vtb0YOow/ag2z+HJxA1whuzd5sb/mJ4xmuKOSPC7Q=; b=J3HiQtAetoZK4KnR8poJq14d2H3j9sE3/3Bi/OdcKxPpbyYBcIxqg9jiAfESfww/2k 7kdVds5cSJFeRo8LSLeFnSt44mK/1hqUX9woeNbbk9wUCji66c7TxsyWIYu9JjvXXNAX CdRilLpu/nnvF04YqeSF5e6t8fCI0UffkVrt+DniHFDtEVjGl9B7HwXyaiyV+nqZUKYi 9wNgJGcqu5iKQWakoL3ugiJJj/YuD5o7CcN8xJ7pDaeWXVJCqQPXgjOvpOFn1muBVere 6eVX34GIzj3aMeZz4dVrYePSl3avtLivu1dZY+fRfvc4RHCiSy5L6rKGPNy/4UNk9+r1 TGjw== X-Gm-Message-State: AJaThX4fsPwLkU3oksBWL1gx93i2CWsD+pBxQQBorI6andKqej0Hqf8t cgnZfMZ0qWQd8KdzOy4k5cFGF2c/JTs= X-Received: by 10.28.183.8 with SMTP id h8mr4619909wmf.2.1509968462429; Mon, 06 Nov 2017 03:41:02 -0800 (PST) Received: from localhost.localdomain ([105.129.222.2]) by smtp.gmail.com with ESMTPSA id w18sm11604012wra.30.2017.11.06.03.40.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Nov 2017 03:41:00 -0800 (PST) From: Ard Biesheuvel To: ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, adrian.hunter@intel.com, linux-mmc@vger.kernel.org Cc: devicetree@vger.kernel.org, Ard Biesheuvel Subject: [PATCH v2 2/2] sdhci-fujitsu: add support for setting the CMD_DAT_DELAY attribute Date: Mon, 6 Nov 2017 11:40:50 +0000 Message-Id: <20171106114050.15169-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171106114050.15169-1-ard.biesheuvel@linaro.org> References: <20171106114050.15169-1-ard.biesheuvel@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Socionext SynQuacer SoC inherits this IP from Fujitsu, but requires the F_SDH30_CMD_DAT_DELAY bit to be set in the F_SDH30_ESD_CONTROL control register. So set this bit if the DT node has the 'fujitsu,cmd-dat-delay-select' property. Signed-off-by: Ard Biesheuvel --- drivers/mmc/host/sdhci_f_sdh30.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/sdhci_f_sdh30.c b/drivers/mmc/host/sdhci_f_sdh30.c index 111b66f5439b..c5bf69ef7e40 100644 --- a/drivers/mmc/host/sdhci_f_sdh30.c +++ b/drivers/mmc/host/sdhci_f_sdh30.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "sdhci-pltfm.h" @@ -45,8 +46,9 @@ struct f_sdhost_priv { struct clk *clk_iface; struct clk *clk; - u32 vendor_hs200; struct device *dev; + u32 vendor_hs200; + bool enable_cmd_dat_delay; }; static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host) @@ -84,10 +86,19 @@ static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host) static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask) { + struct f_sdhost_priv *priv = sdhci_priv(host); + u32 ctl; + if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); sdhci_reset(host, mask); + + if (priv->enable_cmd_dat_delay) { + ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL); + ctl |= F_SDH30_CMD_DAT_DELAY; + sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); + } } static const struct sdhci_ops sdhci_f_sdh30_ops = { @@ -126,6 +137,11 @@ static int sdhci_f_sdh30_probe(struct platform_device *pdev) host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE | SDHCI_QUIRK2_TUNING_WORK_AROUND; + if (device_property_read_bool(dev, "fujitsu,cmd-dat-delay-select")) { + dev_info(dev, "Setting cmd-dat-delay\n"); + priv->enable_cmd_dat_delay = true; + } + ret = mmc_of_parse(host->mmc); if (ret) goto err;