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[209.132.180.67]) by mx.google.com with ESMTP id g1si6907574pgn.147.2017.10.03.23.50.51; Tue, 03 Oct 2017 23:50:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=q++rKb8l; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751776AbdJDGut (ORCPT + 6 others); Wed, 4 Oct 2017 02:50:49 -0400 Received: from mail-pg0-f65.google.com ([74.125.83.65]:33339 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751388AbdJDGur (ORCPT ); Wed, 4 Oct 2017 02:50:47 -0400 Received: by mail-pg0-f65.google.com with SMTP id b11so3323737pgn.0; Tue, 03 Oct 2017 23:50:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=1NXNPKlpniBXBvc3eWHKGT4NjYAtc1t3KblBQ2zZFV0=; b=q++rKb8leEPIsiCRdlNqizuT0FYcIuvAi5Qi+jxFXcwA2II8UqkJMVdY0f7i0EHSnx YkNFJfTLyTpLDyG8vVcW4SZv7MWe76Di3WO4w4n0YdG85OcXxxILFllfsQVHuRoGA1n4 lsqKkdGNsK9mmjc1T0/4wPYKLhZFrcY8fKnID3MJHxag/P2y41KR/TMRI3t0sAt0IT/G bvga6hw3rYwf7nuPUWgRnalAxCrko+s4JEjbFj1IagbrI6DBTw8SQYCVLSz2hSMclqHN 3X9nJLPIAIDVdprudrrk27qqIyPkHKCPdGQlPZcMLwUIUHH6dkUCGiUZdRBTagLuee5Q ADWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=1NXNPKlpniBXBvc3eWHKGT4NjYAtc1t3KblBQ2zZFV0=; b=eC8oJtYhMa3I1kZBKwoPxCagIVb1hVSbsNltuk1tBUaNg9FWvUfJN1bq1UqQPUJlPi nXpnwSACsq/9NPQuLCoAQdRVFlFdJfD8H0YpXXnZUHq1ve7ebiNRLjcfd9Nog159zYtg gJeRSx55/KVe01gXjGN1zFrIDpmmWnfKOe9XY1hzRvae4XE4O733DwW6h3JEgcR/nt2n QtJc9qthDgGZmUFO6EsCxT7hbiwin9+3h0C9xpy2tCGFnufty18rfxVCz02r7Vjz8S6h NTi6rCuM/hdcoGxCD1mmNs9U54nIixKqh7c+/t7gS21ygmDF7/TR9Bbe9RxaLDrgi2fW VLnA== X-Gm-Message-State: AHPjjUgLRmfgwbNILIvNVwUdax6FCaFiw48EAeYuLSLUqavvqLj1IGO7 rPxvxdPxAubFml5/48PbfqQ= X-Google-Smtp-Source: AOwi7QD5S9d+w7l2EPJ1ZZsV99Lbsa8v4eAThLDovmuiZSKvD51JcsVfG9PppW2wZY60icr8SdAlAg== X-Received: by 10.84.129.65 with SMTP id 59mr18930511plb.442.1507099847292; Tue, 03 Oct 2017 23:50:47 -0700 (PDT) Received: from aurora.jms.id.au ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id t19sm24567700pfa.73.2017.10.03.23.50.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Oct 2017 23:50:45 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 04 Oct 2017 17:20:38 +1030 From: Joel Stanley To: Joel Stanley , Rob Herring , Mark Rutland Cc: Russell King , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Jeffery , Rick Altherr , Brendan Higgins , =?utf-8?q?C=C3=A9dric_Le_?= =?utf-8?q?Goater?= , linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 8/9] ARM: dts: aspeed: Correctly order UART nodes Date: Wed, 4 Oct 2017 17:19:16 +1030 Message-Id: <20171004064917.2498-9-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171004064917.2498-1-joel@jms.id.au> References: <20171004064917.2498-1-joel@jms.id.au> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Order them all by address. Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 48 +++++++++++++++---------------- arch/arm/boot/dts/aspeed-g5.dtsi | 61 ++++++++++++++++++++-------------------- 2 files changed, 54 insertions(+), 55 deletions(-) -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Andrew Jeffery diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index a549413bda3f..4125e07f22f9 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -183,6 +183,27 @@ clock-names = "PCLK"; }; + uart1: serial@1e783000 { + compatible = "ns16550a"; + reg = <0x1e783000 0x1000>; + reg-shift = <2>; + interrupts = <9>; + clocks = <&clk_uart>; + no-loopback-test; + status = "disabled"; + }; + + uart5: serial@1e784000 { + compatible = "ns16550a"; + reg = <0x1e784000 0x1000>; + reg-shift = <2>; + interrupts = <10>; + clocks = <&clk_uart>; + current-speed = <38400>; + no-loopback-test; + status = "disabled"; + }; + wdt1: wdt@1e785000 { compatible = "aspeed,ast2400-wdt"; reg = <0x1e785000 0x1c>; @@ -197,11 +218,11 @@ status = "disabled"; }; - uart1: serial@1e783000 { + uart6: serial@1e787000 { compatible = "ns16550a"; - reg = <0x1e783000 0x1000>; + reg = <0x1e787000 0x1000>; reg-shift = <2>; - interrupts = <9>; + interrupts = <10>; clocks = <&clk_uart>; no-loopback-test; status = "disabled"; @@ -237,27 +258,6 @@ status = "disabled"; }; - uart5: serial@1e784000 { - compatible = "ns16550a"; - reg = <0x1e784000 0x1000>; - reg-shift = <2>; - interrupts = <10>; - clocks = <&clk_uart>; - current-speed = <38400>; - no-loopback-test; - status = "disabled"; - }; - - uart6: serial@1e787000 { - compatible = "ns16550a"; - reg = <0x1e787000 0x1000>; - reg-shift = <2>; - interrupts = <10>; - clocks = <&clk_uart>; - no-loopback-test; - status = "disabled"; - }; - i2c: i2c@1e78a000 { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index de2dafa71651..61cc2d25143a 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -227,6 +227,26 @@ clock-names = "PCLK"; }; + uart1: serial@1e783000 { + compatible = "ns16550a"; + reg = <0x1e783000 0x1000>; + reg-shift = <2>; + interrupts = <9>; + clocks = <&clk_uart>; + no-loopback-test; + status = "disabled"; + }; + + uart5: serial@1e784000 { + compatible = "ns16550a"; + reg = <0x1e784000 0x1000>; + reg-shift = <2>; + interrupts = <10>; + clocks = <&clk_uart>; + current-speed = <38400>; + no-loopback-test; + status = "disabled"; + }; wdt1: wdt@1e785000 { compatible = "aspeed,ast2500-wdt"; @@ -247,16 +267,6 @@ status = "disabled"; }; - uart1: serial@1e783000 { - compatible = "ns16550a"; - reg = <0x1e783000 0x1000>; - reg-shift = <2>; - interrupts = <9>; - clocks = <&clk_uart>; - no-loopback-test; - status = "disabled"; - }; - lpc: lpc@1e789000 { compatible = "aspeed,ast2500-lpc", "simple-mfd"; reg = <0x1e789000 0x1000>; @@ -287,6 +297,16 @@ }; }; + uart6: serial@1e787000 { + compatible = "ns16550a"; + reg = <0x1e787000 0x1000>; + reg-shift = <2>; + interrupts = <10>; + clocks = <&clk_uart>; + no-loopback-test; + status = "disabled"; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x1000>; @@ -317,27 +337,6 @@ status = "disabled"; }; - uart5: serial@1e784000 { - compatible = "ns16550a"; - reg = <0x1e784000 0x1000>; - reg-shift = <2>; - interrupts = <10>; - clocks = <&clk_uart>; - current-speed = <38400>; - no-loopback-test; - status = "disabled"; - }; - - uart6: serial@1e787000 { - compatible = "ns16550a"; - reg = <0x1e787000 0x1000>; - reg-shift = <2>; - interrupts = <10>; - clocks = <&clk_uart>; - no-loopback-test; - status = "disabled"; - }; - i2c: i2c@1e78a000 { compatible = "simple-bus"; #address-cells = <1>;