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[209.132.180.67]) by mx.google.com with ESMTP id j21si15368005pgn.452.2017.07.31.01.45.02; Mon, 31 Jul 2017 01:45:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=cZekP2hE; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751929AbdGaIpA (ORCPT + 7 others); Mon, 31 Jul 2017 04:45:00 -0400 Received: from mail-lf0-f53.google.com ([209.85.215.53]:36732 "EHLO mail-lf0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751157AbdGaIo5 (ORCPT ); Mon, 31 Jul 2017 04:44:57 -0400 Received: by mail-lf0-f53.google.com with SMTP id o85so51431198lff.3 for ; Mon, 31 Jul 2017 01:44:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=dCyitkZV1Dja4B3CvKiiRxN63qk+3BHsOxbAWefMKjY=; b=cZekP2hEsD36ZXAd+FVNra01tkryR6U/Ix0vfAXwNbcBM0OO6b666SM82uUTruoOcD M5XIGUWGugXTRo/uKerEsS1gd1+2LswWnRRuMFxC4qsnnWAoXINOs92jUy/JtLchX5bq Rcv3C+ZA0DNWUmmgv0ifsyYDSNs7sdRAkTwjo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=dCyitkZV1Dja4B3CvKiiRxN63qk+3BHsOxbAWefMKjY=; b=nyIkeY/dSnCzxBFwRpdjBH1FhPqQBeluqyQEAZplhWpIY02tfvRdVOqpEDTx1t94E6 sDuqKAk6TiUI5Y10e4qQlhpJodjJqxcDkBD8pMxpUOYDJFHcHvprjUjg720CgxVv8vz6 fTvMzXkYhcMJduoEwXC6EVrO7iljCnAhlflDDzqihUfJ9yqsFrJlizcxNPK11xoJ07vR IIDVjMoTHqwNSLPVA0IiNjsz0KKDRn94xfW/ecPnsBN9zRfrbS+RlRkiuLOoI+MBFz48 gOJc1PVP+B+EmxUDXAnTVpoUdKgwlXz7kJYDnUlgsKZK2f5BapDvqSaA46YR0YKMYjll BMpA== X-Gm-Message-State: AIVw110DmFsgX4KLdoT8kfzXwZeug4i6RsTHkPDQRSwIUDQtLcwwz6dq dre+/VV5AHl4MSVr X-Received: by 10.46.64.150 with SMTP id r22mr480147lje.32.1501490696044; Mon, 31 Jul 2017 01:44:56 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id m5sm5300315lfm.82.2017.07.31.01.44.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 31 Jul 2017 01:44:55 -0700 (PDT) From: Linus Walleij To: Bjorn Helgaas , Lorenzo Pieralisi , Arnd Bergmann , devicetree@vger.kernel.org Cc: linux-pci@vger.kernel.org, Linus Walleij Subject: [PATCH 1/2] PCI: v3: Update the device tree bindings Date: Mon, 31 Jul 2017 10:44:51 +0200 Message-Id: <20170731084451.19736-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The bindings for the V3 Semiconductor PCI bridge are a tad bit outdated and predates the more formal format we have adopted for the bindings. Update them a bit so it is easier to read, and add the Integrator AP- specific compatible so we can detect that we are running on that specific platform. Signed-off-by: Linus Walleij --- .../devicetree/bindings/pci/v3-v360epc-pci.txt | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) -- 2.9.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt index 30b364e504ba..bcc5fe2a74cb 100644 --- a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt +++ b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt @@ -2,14 +2,15 @@ V3 Semiconductor V360 EPC PCI bridge This bridge is found in the ARM Integrator/AP (Application Platform) -Integrator-specific notes: - -- syscon: should contain a link to the syscon device node (since - on the Integrator, some registers in the syscon are required to - operate the V3). - -V360 EPC specific notes: - -- reg: should contain the base address of the V3 adapter. +Required properties: +- compatible: should be one of: + "v3,v360epc-pci" + "arm,integrator-ap-pci", "v3,v360epc-pci" +- reg: should contain the base address of the V3 host bridge. - interrupts: should contain a reference to the V3 error interrupt as routed on the system. + +Integrator-specific required properties: +- syscon: should contain a link to the syscon device node, since + on the Integrator, some registers in the syscon are required to + operate the V3 host bridge.