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[202.81.18.30]) by smtp.gmail.com with ESMTPSA id c23sm16290636pfh.131.2017.05.25.20.32.31 (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 25 May 2017 20:32:36 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Fri, 26 May 2017 13:32:27 +1000 From: Joel Stanley To: Philipp Zabel , Rob Herring , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Benjamin Herrenschmidt , Andrew Jeffery Subject: [PATCH 1/2] dt-bindings: reset: Add bindings for basic reset controller Date: Fri, 26 May 2017 13:32:13 +1000 Message-Id: <20170526033214.8081-2-joel@jms.id.au> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170526033214.8081-1-joel@jms.id.au> References: <20170526033214.8081-1-joel@jms.id.au> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the bindings documentation for a basic single-register reset controller. The bindings describe a single 32-bit register that contains up to 32 reset lines, each deasserted by clearing the appropriate bit in the register. Signed-off-by: Joel Stanley --- .../devicetree/bindings/reset/reset-basic.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/reset-basic.txt -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/reset/reset-basic.txt b/Documentation/devicetree/bindings/reset/reset-basic.txt new file mode 100644 index 000000000000..7341e04e7904 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/reset-basic.txt @@ -0,0 +1,31 @@ +Basic single-register reset controller +====================================== + +This describes a generic reset controller where the reset lines are controlled +by single bits within a 32-bit memory location. The memory location is assumed +to be part of a syscon regmap. + +Reset controller required properties: + - compatible: should be "reset-basic" + - #reset-cells: must be set to 1 + - reg: reset register location within regmap + +Device node required properties: + - resets phandle + - bit number, counting from zero, for the desired reset line. Max is 31. + +Example: + +syscon { + compatible = "syscon"; + + uart_rest: rest@0c { + compatible = "reset-basic"; + #reset-cells = <1>; + reg = <0x0c>; + }; +} + +&uart { + resets = <&uart_rest 0x04>; +}