From patchwork Wed Mar 16 06:17:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 552850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80CFCC433EF for ; Wed, 16 Mar 2022 06:18:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353882AbiCPGTO (ORCPT ); Wed, 16 Mar 2022 02:19:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49278 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353868AbiCPGTF (ORCPT ); Wed, 16 Mar 2022 02:19:05 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5FE9DA5; Tue, 15 Mar 2022 23:17:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1647411469; x=1678947469; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=ZOgr/touExLgastvk8G90GV7x9m0NeDf7OI5FkKHr5k=; b=ElcIjLp9Mdz3eWIDafcfExyrlgoMF6X1Ma8fK2bTMRIJ2wnOrcNN94QG Zamn+LgSoZt8IEq44HGqeGkQz0kdZcbWRc3cxYZtU9ZZ+cXUKpatXwO7E LphqltdvtN8ApK7c1KnNeh+K9kxbzEdYypIXKyi5vVRe2VK376LFXL0ir w=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 15 Mar 2022 23:17:49 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 15 Mar 2022 23:17:48 -0700 X-QCInternal: smtphost Received: from hu-rohiagar-hyd.qualcomm.com (HELO hu-sgudaval-hyd.qualcomm.com) ([10.213.106.138]) by ironmsg02-blr.qualcomm.com with ESMTP; 16 Mar 2022 11:47:35 +0530 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id C3AC54495; Wed, 16 Mar 2022 11:47:34 +0530 (+0530) From: Rohit Agarwal To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rohit Agarwal Subject: [PATCH 1/6] ARM: dts: qcom: sdx65: Add spmi node Date: Wed, 16 Mar 2022 11:47:22 +0530 Message-Id: <1647411447-25249-2-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1647411447-25249-1-git-send-email-quic_rohiagar@quicinc.com> References: <1647411447-25249-1-git-send-email-quic_rohiagar@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add SPMI node to SDX65 dtsi. Signed-off-by: Rohit Agarwal --- arch/arm/boot/dts/qcom-sdx65.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 1457912..ba7b6c5 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -91,6 +91,25 @@ status = "disabled"; }; + spmi_bus: qcom,spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0xc440000 0xd00>, + <0xc600000 0x2000000>, + <0xe600000 0x100000>, + <0xe700000 0xa0000>, + <0xc40a000 0x26000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <0>; + cell-index = <0>; + qcom,channel = <0>; + qcom,ee = <0>; + }; + tlmm: pinctrl@f100000 { compatible = "qcom,sdx65-tlmm"; reg = <0xf100000 0x300000>;