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[1/3] arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset

Message ID 1640274189-14120-2-git-send-email-quic_srivasam@quicinc.com
State New
Headers show
Series Add lpass pin control support for audio on sc7280 based targets | expand

Commit Message

Srinivasa Rao Mandadapu Dec. 23, 2021, 3:43 p.m. UTC 
Add AMP enable node and pinmux for primary and secondary I2S
for SC7280 based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 11 +++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi     | 55 ++++++++++++++++++++++++++++++++
 2 files changed, 66 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index d623d71..86f182c 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -491,6 +491,17 @@ 
 };
 
 &tlmm {
+	amp_en: amp-en {
+		pinmux {
+			pins = "gpio63";
+			function = "gpio";
+		};
+		pinconf {
+			pins = "gpio63";
+			bias-pull-down;
+		};
+	};
+
 	nvme_pwren: nvme-pwren {
 		function = "gpio";
 	};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 937c2e0..b5ebc9ec 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3461,6 +3461,61 @@ 
 				};
 			};
 
+			pri_mi2s_active: primary_mi2s_active {
+				sclk {
+					pins = "gpio97";
+					function = "mi2s0_sck";
+					drive-strength = <16>;
+				};
+				ws {
+					pins = "gpio100";
+					function = "mi2s0_ws";
+					drive-strength = <16>;
+				};
+				data0 {
+					pins = "gpio98";
+					function = "mi2s0_data0";
+					drive-strength = <16>;
+				};
+				data1 {
+					pins = "gpio99";
+					function = "mi2s0_data1";
+					drive-strength = <16>;
+				};
+			};
+
+			pri_mi2s_mclk_active: pri-mi2s-mclk-active {
+				pinmux {
+					pins = "gpio96";
+					function = "pri_mi2s";
+				};
+			};
+
+			sec_mi2s_active: sec-mi2s-active {
+				sclk {
+					pins = "gpio106";
+					function = "mi2s1_sck";
+					drive-strength = <16>;
+					bias-disable;
+					output-high;
+				};
+
+				ws {
+					pins = "gpio108";
+					function = "mi2s1_ws";
+					drive-strength = <16>;
+					output-high;
+				};
+
+				data0 {
+					pins = "gpio107";
+					function = "mi2s1_data0";
+					drive-strength = <16>;
+					bias-disable;
+					output-high;
+				};
+			};
+
 			qup_uart8_cts: qup-uart8-cts {
 				pins = "gpio32";
 				function = "qup10";