From patchwork Thu Jun 24 18:52:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 467029 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D490C49EAF for ; Thu, 24 Jun 2021 18:53:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1B7C4613F9 for ; Thu, 24 Jun 2021 18:53:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232675AbhFXS4F (ORCPT ); Thu, 24 Jun 2021 14:56:05 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:21512 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232757AbhFXSz7 (ORCPT ); Thu, 24 Jun 2021 14:55:59 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1624560820; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=ckQKqbGoUJRFsOLMPFFkbfxD0heV9XhWVgc26AqnU5Q=; b=h+Dl51152z8928Lx+f7j4sHcxyYR+l/IiVA9QyV2MOzK15ou5ma3UwBwvObH7loVx2BmmA2T ZOtsa6WYMOXyX9F6KO4xZNwNk8sWvY2ja4aKCRaeOCGuR0ndpI0O+Kv2balDUW0CDxXAdpP9 IiVHPjPdixuYuNV/NOzewZj/zds= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-west-2.postgun.com with SMTP id 60d4d4b3d2559fe3924e7ace (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 24 Jun 2021 18:53:39 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 1F312C43143; Thu, 24 Jun 2021 18:53:38 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 16A15C4360C; Thu, 24 Jun 2021 18:53:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 16A15C4360C Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: bjorn.andersson@linaro.org, robh+dt@kernel.org, swboyd@chromium.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v3 10/13] arm64: dts: qcom: sm8350: Use QMP binding to control load state Date: Fri, 25 Jun 2021 00:22:04 +0530 Message-Id: <1624560727-6870-11-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624560727-6870-1-git-send-email-sibis@codeaurora.org> References: <1624560727-6870-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) binding to control the load state resources on SM8350 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 0d16392bb976..2d78a55f33c2 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include @@ -703,15 +702,16 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, - <&rpmhpd 0>, + power-domains = <&rpmhpd 0>, <&rpmhpd 12>; - power-domain-names = "load_state", "cx", "mss"; + power-domain-names = "cx", "mss"; interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; memory-region = <&pil_modem_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_modem_out 0>; qcom,smem-state-names = "stop"; @@ -771,7 +771,6 @@ mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { @@ -1070,13 +1069,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, - <&rpmhpd 4>, + power-domains = <&rpmhpd 4>, <&rpmhpd 5>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&pil_slpi_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_slpi_out 0>; qcom,smem-state-names = "stop"; @@ -1110,15 +1110,16 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, - <&rpmhpd 0>, + power-domains = <&rpmhpd 0>, <&rpmhpd 10>; - power-domain-names = "load_state", "cx", "mxc"; + power-domain-names = "cx", "mxc"; interconnects = <&compute_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>; memory-region = <&pil_cdsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_cdsp_out 0>; qcom,smem-state-names = "stop"; @@ -1344,13 +1345,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, - <&rpmhpd 4>, + power-domains = <&rpmhpd 4>, <&rpmhpd 5>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&pil_adsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-state-names = "stop";