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Mon, 15 Mar 2021 17:40:24 +0000 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 15 Mar 2021 17:40:24 +0000 Received: from audio.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 15 Mar 2021 17:40:22 +0000 From: Sameer Pujar To: , CC: , , , , Sameer Pujar Subject: [PATCH v2] arm64: tegra: Move clocks from RT5658 endpoint to device node Date: Mon, 15 Mar 2021 23:10:15 +0530 Message-ID: <1615830015-9195-1-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: df998727-fb9f-46c2-c82f-08d8e7d96a7a X-MS-TrafficTypeDiagnostic: DM6PR12MB4532: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6790; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ZYkmVpXY/wjl8qqC7v8oahJatJ0J3vj1UVUET3GfpoKRvajPrRnju/dqPFz4KL8WRNYarDdOfh5NLZQ1eUk1QV1hfgFUpXCUvse2YMedundMRLy9AVZlqJXgoZIwhmQlkbmSVJ+Si8EN5bBU/ipWJkQly3DeLqN3gmZYRv4bR8OBh6VnEX1aOu36k5BG3nx1M4yBBGyaHO7e1gf8jlVBE0k2733XocFZsFMZuoGiEKoYSO7MoT10Qg6eqs9m/VCU7uxvGheYJbpnh3XOOai+asOsx0bwz9BSswBlQmRtW5qjnUkBFgOPLwnHaFnP+vQiZHoHiE7lLdgIrL19CzmC6un6LFM8h6YNIi8jYKzOIatqZ5Zyq5wkzWYBKaBnohBNEfuo0Rl8eCpsATUfR+VWDqZanEQNbMUr/JMDoh6w4LS0ZRklQEKGNUUi0TfEptXXvwBTIx8fUG8cxKVqBWIa/dORNLb1APl63FdBT+9Gox2UOvf23KHN1uLIELunGTc/1uPHpJ2I7JeiXj6vWgQzbvh5VcQ/jurdDthMgwFItLF8K6V+wbTX8Ld5/93qdt5SSbGsVfiyWGvgRVTOrU8C9TcsZMDDcStNNYo7rxTAu+o3TWANb5+i+f3dJTJam3qE3Yt9A2K46Gojcph/HUd/gGfvzWw1BBCPQzR7JiCVD8n3RUqb9ZAJEjdGEpMBE1xG X-Forefront-Antispam-Report: CIP:216.228.112.32; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid01.nvidia.com; CAT:NONE; SFS:(4636009)(376002)(136003)(396003)(39860400002)(346002)(36840700001)(46966006)(426003)(36756003)(82740400003)(7636003)(54906003)(83380400001)(107886003)(86362001)(36860700001)(336012)(4326008)(316002)(70586007)(8936002)(478600001)(82310400003)(356005)(186003)(2616005)(5660300002)(47076005)(70206006)(8676002)(7696005)(2906002)(26005)(6666004)(110136005)(34020700004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Mar 2021 17:40:25.2106 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: df998727-fb9f-46c2-c82f-08d8e7d96a7a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.32]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT009.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4532 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org An endpoint is not a device and it is recommended to use clocks property in device node. RT5658 Codec binding already specifies the usage of clocks property. Thus move the clocks from endpoint to device node. Fixes: 5b4f6323096a ("arm64: tegra: Audio graph sound card for Jetson AGX Xavier") Suggested-by: Rob Herring Signed-off-by: Sameer Pujar --- Changelog: v1 -> v2: Added "clock-names" property as rt5659 driver specifically looks for this clock name. arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts index b079420..8dd2871 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts @@ -651,6 +651,8 @@ reg = <0x1a>; interrupt-parent = <&gpio>; interrupts = ; + clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>; + clock-names = "mclk"; realtek,jd-src = <2>; sound-name-prefix = "CVB-RT"; @@ -658,7 +660,6 @@ rt5658_ep: endpoint { remote-endpoint = <&i2s1_dap_ep>; mclk-fs = <256>; - clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>; }; }; };