From patchwork Wed Dec 23 20:27:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Wahren X-Patchwork-Id: 352040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08778C4332E for ; Wed, 23 Dec 2020 20:30:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CBA01221F5 for ; Wed, 23 Dec 2020 20:30:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727187AbgLWUai (ORCPT ); Wed, 23 Dec 2020 15:30:38 -0500 Received: from mout.kundenserver.de ([217.72.192.75]:52473 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728524AbgLWUai (ORCPT ); Wed, 23 Dec 2020 15:30:38 -0500 Received: from localhost.localdomain ([37.4.249.194]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.183]) with ESMTPSA (Nemesis) id 1MWAWq-1kXruK2Ok6-00XaWK; Wed, 23 Dec 2020 21:27:54 +0100 From: Stefan Wahren To: Eric Anholt , Maxime Ripard , David Airlie , Daniel Vetter , Rob Herring , Nicolas Saenz Julienne Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Stefan Wahren Subject: [PATCH 4/4] dt-bindings: gpu: Convert v3d to json-schema Date: Wed, 23 Dec 2020 21:27:25 +0100 Message-Id: <1608755245-18069-5-git-send-email-stefan.wahren@i2se.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> References: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> X-Provags-ID: V03:K1:pX/LN56hT9ajMLlvxi29HcfZUurA9LJeN+C603L1/ANg4ENBvmH w8uwkjHfG6FBZOFYjf91uWTVS/K0USc5MX0apWyoBD+22FozIOQ6/wN95vavl47a/80dTji RUQrvmeCw/ZYYws++GuhRIa9GvSLxmdtRGcRUu2gjJgB89mAya4j41QMQDK0keaYHUqzrUz 88bgQvA0pJMUS2pJzpYww== X-UI-Out-Filterresults: notjunk:1; V03:K0:rvmANF2DETk=:iUfSGjqZA22mOgY1peyWtD LWY/4a2JplXHfh5Fs1s22faqkSDd7w43ceEyG+sNm3d8h18ehAz1x0NZfCx7nL7G+7u9SwnfH ELjKDu3r43orXRQDkwKiJbK4yZhb7Mcmbuz6tohQI4KHtsQCwBHA4nY/w8+vi8IMB0JfTZZXD VNlTO7h8lBTLPVUIKIO/PYHouvMDdcdhkqandpY5bN/EKqBDDta/yoYcD2E15gT/8+nsoeaGu QiO1pXGG7RipZ2Kv6VKXKfjyFvASLqeLrtFAnGy2x00Lp0oKqjf7+P+nwaoUsVw2xaXyVfr6E QvDtsmduAqOpL0cmIXAifjeAPhmiD4rRk6quq6vPJ3xSSyy8HZbWVp9PD+Pt5h2jjz/ecbO5I oyA37QqS89immqVAbtwRUmuy9KBXCOKyltUYkFI3GZarTy32qf/ht3Etl/PoqZKuC6cDdXtNY uM9HxKs/nw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This converts the v3d bindings to yaml format. Signed-off-by: Stefan Wahren --- .../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 33 ---------- .../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 76 ++++++++++++++++++++++ 2 files changed, 76 insertions(+), 33 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt deleted file mode 100644 index b2df82b..0000000 --- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt +++ /dev/null @@ -1,33 +0,0 @@ -Broadcom V3D GPU - -Only the Broadcom V3D 3.x and newer GPUs are covered by this binding. -For V3D 2.x, see brcm,bcm-vc4.txt. - -Required properties: -- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d" -- reg: Physical base addresses and lengths of the register areas -- reg-names: Names for the register areas. The "hub" and "core0" - register areas are always required. The "gca" register area - is required if the GCA cache controller is present. The - "bridge" register area is required if an external reset - controller is not present. -- interrupts: The interrupt numbers. The first interrupt is for the hub, - while the following interrupts are separate interrupt lines - for the cores (if they don't share the hub's interrupt). - See bindings/interrupt-controller/interrupts.txt - -Optional properties: -- clocks: The core clock the unit runs on -- resets: The reset line for v3d, if not using a mapping of the bridge - See bindings/reset/reset.txt - -v3d { - compatible = "brcm,7268-v3d"; - reg = <0xf1204000 0x100>, - <0xf1200000 0x4000>, - <0xf1208000 0x4000>, - <0xf1204100 0x100>; - reg-names = "bridge", "hub", "core0", "gca"; - interrupts = <0 78 4>, - <0 77 4>; -}; diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml new file mode 100644 index 0000000..a2b06d42 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom V3D GPU Bindings + +maintainers: + - Eric Anholt + - Nicolas Saenz Julienne + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + + compatible: + enum: + - brcm,7268-v3d + - brcm,7278-v3d + + reg: + items: + - description: hub register + - description: core0 register + - description: GCA cache controller register (if GCA controller) + - description: bridge register (if no external reset controller) + minItems: 2 + maxItems: 4 + + reg-names: + items: + enum: [ bridge, core0, gca, hub ] + minItems: 2 + maxItems: 4 + + interrupts: + items: + - description: hub interrupt + - description: core interrupt (if it doesn't share the hub's interrupt) + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + gpu@f1200000 { + compatible = "brcm,7268-v3d"; + reg = <0xf1204000 0x100>, + <0xf1200000 0x4000>, + <0xf1208000 0x4000>, + <0xf1204100 0x100>; + reg-names = "bridge", "hub", "core0", "gca"; + interrupts = <0 78 4>, + <0 77 4>; + }; + +...