From patchwork Mon Dec 7 09:12:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 339160 Delivered-To: patch@linaro.org Received: by 2002:a17:906:4755:0:0:0:0 with SMTP id j21csp2720207ejs; Mon, 7 Dec 2020 01:22:14 -0800 (PST) X-Google-Smtp-Source: ABdhPJztu+dseO8+pkA6SI8cQ/QtMc+iUr+3HAFy1iNPirt2Uoq1nn4NLqtrbzef+YmCxCMx9QSi X-Received: by 2002:a17:906:77c5:: with SMTP id m5mr17541357ejn.424.1607332933908; Mon, 07 Dec 2020 01:22:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607332933; cv=none; d=google.com; s=arc-20160816; b=Ocd0wjSWM7gNB/bJU+c3SFpRQL5pKYliSBb6c0aE2TfzJsX673L4M27QRXnvLdzAHE Fe3KeyWi+hb108/OdzNx7V7jZFIWYLddArPaAVOMc+AYV5ueVJ/FcTpMl13CVWKHc9Jd RicTHmzWPGCKJXzB+3VSZFZy14TEA8+zeJ8arR0aSPSD2mPKF5d0K/IcvAU/Y70/p5x7 TaUfq7QgMe8AfMFdI95kA7X3ZDOgsrKekHKJwHhppxhcoFpb8xURd4DtP2KBm+KSmGCo vmyMqMDM9UZ/0/mzTfBrONKgWDjSWEKoAwBKRo/qaa+G7hyLAm4oq3SioBHXEB0Guhxp tsbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=dxxplysKLClQQFp6VCSfE5gRO3ItInbZYYxSsM9DdQE=; b=JcQS2FMAjl1E43T/x1qJzpcmjY3X2+CDrPnoBpxTUq7BtEJ3xR9hIWh+f8KcGjn1qH tgkcyTETrxGEx2ym+H+lfsyzdhhLz+uAtrvQ8MYLvAmIbNaILYVSYdmBspmPuAxePp5z O7VblocZcQtMdbfTRzpbHxym6sydTFFzGgX45JF3YWLH7GpXbr7Rss8I2wmOQ7M/skS0 8At4wTYnIZSLVvdq62R+dotxLk9jSVK2PD7ZoCIGKyIPcj157ScQVggZ6shujIdnQLER fCSFFvippyju92wsOZddIXUUl5nQAnAHOlUPseHDAabQM/3sL3wZ76b+r3VWuUbt2vMe C7XQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z7si8074942edm.477.2020.12.07.01.22.13; Mon, 07 Dec 2020 01:22:13 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725804AbgLGJVP (ORCPT + 6 others); Mon, 7 Dec 2020 04:21:15 -0500 Received: from inva021.nxp.com ([92.121.34.21]:44398 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725779AbgLGJVO (ORCPT ); Mon, 7 Dec 2020 04:21:14 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 22A9F200B51; Mon, 7 Dec 2020 10:20:28 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 10B80200D75; Mon, 7 Dec 2020 10:20:24 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 70552402AB; Mon, 7 Dec 2020 10:20:18 +0100 (CET) From: Shengjiu Wang To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: shengjiu.wang@gmail.com Subject: [PATCH 1/3] arm64: dts: imx8mn: Configure clock rate for audio plls Date: Mon, 7 Dec 2020 17:12:34 +0800 Message-Id: <1607332356-13431-2-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607332356-13431-1-git-send-email-shengjiu.wang@nxp.com> References: <1607332356-13431-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Configure clock rate for audio plls. audio pll1 is used as parent clock for clocks that is multiple of 8kHz. audio pll2 is used as parent clock for clocks that is multiple of 11kHz. Signed-off-by: Shengjiu Wang --- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) -- 2.27.0 diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index e35182ff6f59..439cf6ca3114 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -581,7 +581,9 @@ clk: clock-controller@30380000 { <&clk IMX8MN_CLK_NOC>, <&clk IMX8MN_CLK_AUDIO_AHB>, <&clk IMX8MN_CLK_IPG_AUDIO_ROOT>, - <&clk IMX8MN_SYS_PLL3>; + <&clk IMX8MN_SYS_PLL3>, + <&clk IMX8MN_AUDIO_PLL1>, + <&clk IMX8MN_AUDIO_PLL2>; assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_800M>, <&clk IMX8MN_ARM_PLL_OUT>, <&clk IMX8MN_SYS_PLL3_OUT>, @@ -589,7 +591,9 @@ clk: clock-controller@30380000 { assigned-clock-rates = <0>, <0>, <0>, <400000000>, <400000000>, - <600000000>; + <600000000>, + <393216000>, + <361267200>; }; src: reset-controller@30390000 {