From patchwork Tue Dec 1 13:50:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bongsu Jeon X-Patchwork-Id: 335245 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71DCFC64E7A for ; Tue, 1 Dec 2020 13:52:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1249420705 for ; Tue, 1 Dec 2020 13:52:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WV8Bl0kx" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391321AbgLANvo (ORCPT ); Tue, 1 Dec 2020 08:51:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387587AbgLANvo (ORCPT ); Tue, 1 Dec 2020 08:51:44 -0500 Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 19AE5C0617A6; Tue, 1 Dec 2020 05:51:19 -0800 (PST) Received: by mail-pg1-x544.google.com with SMTP id t3so1217612pgi.11; Tue, 01 Dec 2020 05:51:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kJb2fLl2FeXcTp/ta1SBlMW4Rm+oQPCwEyK3Bouh5+Q=; b=WV8Bl0kxfJluGPHnGLlcOPmJmxCBo3DSNLewdc7UEIifhon12fxaSH9wwhLwaJGZKP DHHd1/Sl2bGiQLzUdJv8C8l1g6ga3vwR7GLNNPXwcq6t/4YO1JXeKKQ0jCKW1cdO+TLv /V4Kbb+txvJWKR+w8lQZ86H2owP2T0E7AqPla3G1roU6o9uVCJG3amPtJ+Rq5n55sUoy 3THTCkbGe1udfd/MUkVJHLj2X/DILLhxJc0hj/yf1bwIL36cmz0EQsB9A9UTCdD+9AdD eDfMyOheXVn55IVgOd/TGZOE9eBzcJHzGzZVraPOvvQN6tfwNG3tv1mzUV0glkmWioaD eajw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kJb2fLl2FeXcTp/ta1SBlMW4Rm+oQPCwEyK3Bouh5+Q=; b=aXa6iKx5+r+6Da3FKftbwS5dlbEz97NvKwi/EEhpjkgr8bs3Vfv4N4wYSlDtN0kTUH mp6DEWtKMDqio6Ac0S4GJT6HX/iNMsVEaGRRzeRVvGj+O+EDYvuK4c8wRUgGwpr/mgZq rxh62BH4/SSzKXoJdb9v5YJ+hUE6kqCZZQ5DEZxp1m/JOARNZCCC2QsTr5QYiNrJQy4i Sle53IgeEicEZsgNgRGR2CqAqzGvyTils39z4R8YmZAUBXji8CiBuudp1tn+2zrnECQa 74RHTLiREgkYOuZGP1hxBlxmcuLKh31hH/7D9xXsxMMGJRV0dDO5aZD9Mp9UrIj/qnYr 6BZA== X-Gm-Message-State: AOAM532QIHe59MmDB4vATzbhZgGg6ATVgxhAXFHnkEjgU5yCkBs4nYYx oIVwwxsTi0FwKt7Fb/jbHBU= X-Google-Smtp-Source: ABdhPJz2U76Pj0nIRoG+24UxQWFbETx4n+2lJnZdptGO/2yLGQP1xsplveJ39DIhoNki42oFACOX2A== X-Received: by 2002:a63:7d4d:: with SMTP id m13mr2333087pgn.182.1606830678651; Tue, 01 Dec 2020 05:51:18 -0800 (PST) Received: from localhost.localdomain ([182.226.226.37]) by smtp.googlemail.com with ESMTPSA id z22sm3134111pfn.153.2020.12.01.05.51.16 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Dec 2020 05:51:18 -0800 (PST) From: Bongsu Jeon X-Google-Original-From: Bongsu Jeon To: krzk@kernel.org Cc: linux-nfc@lists.01.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bongsu Jeon Subject: [PATCH v4 net-next 3/4] nfc: s3fwrn5: extract the common phy blocks Date: Tue, 1 Dec 2020 22:50:27 +0900 Message-Id: <1606830628-10236-4-git-send-email-bongsu.jeon@samsung.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1606830628-10236-1-git-send-email-bongsu.jeon@samsung.com> References: <1606830628-10236-1-git-send-email-bongsu.jeon@samsung.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Bongsu Jeon Extract the common phy blocks to reuse it. The UART module will use the common blocks. Signed-off-by: Bongsu Jeon Reviewed-by: Krzysztof Kozlowski --- drivers/nfc/s3fwrn5/Makefile | 2 +- drivers/nfc/s3fwrn5/i2c.c | 117 +++++++++++++-------------------------- drivers/nfc/s3fwrn5/phy_common.c | 63 +++++++++++++++++++++ drivers/nfc/s3fwrn5/phy_common.h | 36 ++++++++++++ 4 files changed, 139 insertions(+), 79 deletions(-) create mode 100644 drivers/nfc/s3fwrn5/phy_common.c create mode 100644 drivers/nfc/s3fwrn5/phy_common.h diff --git a/drivers/nfc/s3fwrn5/Makefile b/drivers/nfc/s3fwrn5/Makefile index d0ffa35..6b6f52d 100644 --- a/drivers/nfc/s3fwrn5/Makefile +++ b/drivers/nfc/s3fwrn5/Makefile @@ -3,7 +3,7 @@ # Makefile for Samsung S3FWRN5 NFC driver # -s3fwrn5-objs = core.o firmware.o nci.o +s3fwrn5-objs = core.o firmware.o nci.o phy_common.o s3fwrn5_i2c-objs = i2c.o obj-$(CONFIG_NFC_S3FWRN5) += s3fwrn5.o diff --git a/drivers/nfc/s3fwrn5/i2c.c b/drivers/nfc/s3fwrn5/i2c.c index 9a64eea..e1bdde1 100644 --- a/drivers/nfc/s3fwrn5/i2c.c +++ b/drivers/nfc/s3fwrn5/i2c.c @@ -15,75 +15,30 @@ #include -#include "s3fwrn5.h" +#include "phy_common.h" #define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c" -#define S3FWRN5_EN_WAIT_TIME 20 - struct s3fwrn5_i2c_phy { + struct phy_common common; struct i2c_client *i2c_dev; - struct nci_dev *ndev; - - int gpio_en; - int gpio_fw_wake; - - struct mutex mutex; - enum s3fwrn5_mode mode; unsigned int irq_skip:1; }; -static void s3fwrn5_i2c_set_wake(void *phy_id, bool wake) -{ - struct s3fwrn5_i2c_phy *phy = phy_id; - - mutex_lock(&phy->mutex); - gpio_set_value(phy->gpio_fw_wake, wake); - msleep(S3FWRN5_EN_WAIT_TIME); - mutex_unlock(&phy->mutex); -} - static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode) { struct s3fwrn5_i2c_phy *phy = phy_id; - mutex_lock(&phy->mutex); + mutex_lock(&phy->common.mutex); - if (phy->mode == mode) + if (s3fwrn5_phy_power_ctrl(&phy->common, mode) == false) goto out; - phy->mode = mode; - - gpio_set_value(phy->gpio_en, 1); - gpio_set_value(phy->gpio_fw_wake, 0); - if (mode == S3FWRN5_MODE_FW) - gpio_set_value(phy->gpio_fw_wake, 1); - - if (mode != S3FWRN5_MODE_COLD) { - msleep(S3FWRN5_EN_WAIT_TIME); - gpio_set_value(phy->gpio_en, 0); - msleep(S3FWRN5_EN_WAIT_TIME); - } - phy->irq_skip = true; out: - mutex_unlock(&phy->mutex); -} - -static enum s3fwrn5_mode s3fwrn5_i2c_get_mode(void *phy_id) -{ - struct s3fwrn5_i2c_phy *phy = phy_id; - enum s3fwrn5_mode mode; - - mutex_lock(&phy->mutex); - - mode = phy->mode; - - mutex_unlock(&phy->mutex); - - return mode; + mutex_unlock(&phy->common.mutex); } static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) @@ -91,7 +46,7 @@ static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) struct s3fwrn5_i2c_phy *phy = phy_id; int ret; - mutex_lock(&phy->mutex); + mutex_lock(&phy->common.mutex); phy->irq_skip = false; @@ -102,7 +57,7 @@ static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len); } - mutex_unlock(&phy->mutex); + mutex_unlock(&phy->common.mutex); if (ret < 0) return ret; @@ -114,9 +69,9 @@ static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) } static const struct s3fwrn5_phy_ops i2c_phy_ops = { - .set_wake = s3fwrn5_i2c_set_wake, + .set_wake = s3fwrn5_phy_set_wake, .set_mode = s3fwrn5_i2c_set_mode, - .get_mode = s3fwrn5_i2c_get_mode, + .get_mode = s3fwrn5_phy_get_mode, .write = s3fwrn5_i2c_write, }; @@ -128,7 +83,7 @@ static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy) char hdr[4]; int ret; - hdr_size = (phy->mode == S3FWRN5_MODE_NCI) ? + hdr_size = (phy->common.mode == S3FWRN5_MODE_NCI) ? NCI_CTRL_HDR_SIZE : S3FWRN5_FW_HDR_SIZE; ret = i2c_master_recv(phy->i2c_dev, hdr, hdr_size); if (ret < 0) @@ -137,7 +92,7 @@ static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy) if (ret < hdr_size) return -EBADMSG; - data_len = (phy->mode == S3FWRN5_MODE_NCI) ? + data_len = (phy->common.mode == S3FWRN5_MODE_NCI) ? ((struct nci_ctrl_hdr *)hdr)->plen : ((struct s3fwrn5_fw_header *)hdr)->len; @@ -157,24 +112,24 @@ static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy) } out: - return s3fwrn5_recv_frame(phy->ndev, skb, phy->mode); + return s3fwrn5_recv_frame(phy->common.ndev, skb, phy->common.mode); } static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id) { struct s3fwrn5_i2c_phy *phy = phy_id; - if (!phy || !phy->ndev) { + if (!phy || !phy->common.ndev) { WARN_ON_ONCE(1); return IRQ_NONE; } - mutex_lock(&phy->mutex); + mutex_lock(&phy->common.mutex); if (phy->irq_skip) goto out; - switch (phy->mode) { + switch (phy->common.mode) { case S3FWRN5_MODE_NCI: case S3FWRN5_MODE_FW: s3fwrn5_i2c_read(phy); @@ -184,7 +139,7 @@ static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id) } out: - mutex_unlock(&phy->mutex); + mutex_unlock(&phy->common.mutex); return IRQ_HANDLED; } @@ -197,19 +152,23 @@ static int s3fwrn5_i2c_parse_dt(struct i2c_client *client) if (!np) return -ENODEV; - phy->gpio_en = of_get_named_gpio(np, "en-gpios", 0); - if (!gpio_is_valid(phy->gpio_en)) { + phy->common.gpio_en = of_get_named_gpio(np, "en-gpios", 0); + if (!gpio_is_valid(phy->common.gpio_en)) { /* Support also deprecated property */ - phy->gpio_en = of_get_named_gpio(np, "s3fwrn5,en-gpios", 0); - if (!gpio_is_valid(phy->gpio_en)) + phy->common.gpio_en = of_get_named_gpio(np, + "s3fwrn5,en-gpios", + 0); + if (!gpio_is_valid(phy->common.gpio_en)) return -ENODEV; } - phy->gpio_fw_wake = of_get_named_gpio(np, "wake-gpios", 0); - if (!gpio_is_valid(phy->gpio_fw_wake)) { + phy->common.gpio_fw_wake = of_get_named_gpio(np, "wake-gpios", 0); + if (!gpio_is_valid(phy->common.gpio_fw_wake)) { /* Support also deprecated property */ - phy->gpio_fw_wake = of_get_named_gpio(np, "s3fwrn5,fw-gpios", 0); - if (!gpio_is_valid(phy->gpio_fw_wake)) + phy->common.gpio_fw_wake = of_get_named_gpio(np, + "s3fwrn5,fw-gpios", + 0); + if (!gpio_is_valid(phy->common.gpio_fw_wake)) return -ENODEV; } @@ -226,8 +185,8 @@ static int s3fwrn5_i2c_probe(struct i2c_client *client, if (!phy) return -ENOMEM; - mutex_init(&phy->mutex); - phy->mode = S3FWRN5_MODE_COLD; + mutex_init(&phy->common.mutex); + phy->common.mode = S3FWRN5_MODE_COLD; phy->irq_skip = true; phy->i2c_dev = client; @@ -237,17 +196,19 @@ static int s3fwrn5_i2c_probe(struct i2c_client *client, if (ret < 0) return ret; - ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->gpio_en, - GPIOF_OUT_INIT_HIGH, "s3fwrn5_en"); + ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->common.gpio_en, + GPIOF_OUT_INIT_HIGH, "s3fwrn5_en"); if (ret < 0) return ret; - ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->gpio_fw_wake, - GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake"); + ret = devm_gpio_request_one(&phy->i2c_dev->dev, + phy->common.gpio_fw_wake, + GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake"); if (ret < 0) return ret; - ret = s3fwrn5_probe(&phy->ndev, phy, &phy->i2c_dev->dev, &i2c_phy_ops); + ret = s3fwrn5_probe(&phy->common.ndev, phy, &phy->i2c_dev->dev, + &i2c_phy_ops); if (ret < 0) return ret; @@ -255,7 +216,7 @@ static int s3fwrn5_i2c_probe(struct i2c_client *client, s3fwrn5_i2c_irq_thread_fn, IRQF_TRIGGER_HIGH | IRQF_ONESHOT, S3FWRN5_I2C_DRIVER_NAME, phy); if (ret) - s3fwrn5_remove(phy->ndev); + s3fwrn5_remove(phy->common.ndev); return ret; } @@ -264,7 +225,7 @@ static int s3fwrn5_i2c_remove(struct i2c_client *client) { struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client); - s3fwrn5_remove(phy->ndev); + s3fwrn5_remove(phy->common.ndev); return 0; } diff --git a/drivers/nfc/s3fwrn5/phy_common.c b/drivers/nfc/s3fwrn5/phy_common.c new file mode 100644 index 0000000..5cad1f4 --- /dev/null +++ b/drivers/nfc/s3fwrn5/phy_common.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Link Layer for Samsung S3FWRN5 NCI based Driver + * + * Copyright (C) 2015 Samsung Electrnoics + * Robert Baldyga + * Copyright (C) 2020 Samsung Electrnoics + * Bongsu Jeon + */ + +#include +#include +#include + +#include "phy_common.h" + +void s3fwrn5_phy_set_wake(void *phy_id, bool wake) +{ + struct phy_common *phy = phy_id; + + mutex_lock(&phy->mutex); + gpio_set_value(phy->gpio_fw_wake, wake); + msleep(S3FWRN5_EN_WAIT_TIME); + mutex_unlock(&phy->mutex); +} +EXPORT_SYMBOL(s3fwrn5_phy_set_wake); + +bool s3fwrn5_phy_power_ctrl(struct phy_common *phy, enum s3fwrn5_mode mode) +{ + if (phy->mode == mode) + return false; + + phy->mode = mode; + + gpio_set_value(phy->gpio_en, 1); + gpio_set_value(phy->gpio_fw_wake, 0); + if (mode == S3FWRN5_MODE_FW) + gpio_set_value(phy->gpio_fw_wake, 1); + + if (mode != S3FWRN5_MODE_COLD) { + msleep(S3FWRN5_EN_WAIT_TIME); + gpio_set_value(phy->gpio_en, 0); + msleep(S3FWRN5_EN_WAIT_TIME); + } + + return true; +} +EXPORT_SYMBOL(s3fwrn5_phy_power_ctrl); + +enum s3fwrn5_mode s3fwrn5_phy_get_mode(void *phy_id) +{ + struct phy_common *phy = phy_id; + enum s3fwrn5_mode mode; + + mutex_lock(&phy->mutex); + + mode = phy->mode; + + mutex_unlock(&phy->mutex); + + return mode; +} +EXPORT_SYMBOL(s3fwrn5_phy_get_mode); diff --git a/drivers/nfc/s3fwrn5/phy_common.h b/drivers/nfc/s3fwrn5/phy_common.h new file mode 100644 index 0000000..b98531d --- /dev/null +++ b/drivers/nfc/s3fwrn5/phy_common.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later + * + * Link Layer for Samsung S3FWRN5 NCI based Driver + * + * Copyright (C) 2015 Samsung Electrnoics + * Robert Baldyga + * Copyright (C) 2020 Samsung Electrnoics + * Bongsu Jeon + */ + +#ifndef __NFC_S3FWRN5_PHY_COMMON_H +#define __NFC_S3FWRN5_PHY_COMMON_H + +#include +#include + +#include "s3fwrn5.h" + +#define S3FWRN5_EN_WAIT_TIME 20 + +struct phy_common { + struct nci_dev *ndev; + + int gpio_en; + int gpio_fw_wake; + + struct mutex mutex; + + enum s3fwrn5_mode mode; +}; + +void s3fwrn5_phy_set_wake(void *phy_id, bool wake); +bool s3fwrn5_phy_power_ctrl(struct phy_common *phy, enum s3fwrn5_mode mode); +enum s3fwrn5_mode s3fwrn5_phy_get_mode(void *phy_id); + +#endif /* __NFC_S3FWRN5_PHY_COMMON_H */