From patchwork Thu Jun 18 08:38:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 191093 Delivered-To: patch@linaro.org Received: by 2002:a54:30ca:0:0:0:0:0 with SMTP id e10csp1126172ecs; Thu, 18 Jun 2020 01:39:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzc9S9H2SkYZd1rwUfE+ZiY3oS5EN9sXnIR8l/xXGM8+GcPuXxzNsz2cJ3e0wtuRoJbRnKi X-Received: by 2002:a17:906:ccdd:: with SMTP id ot29mr2812425ejb.119.1592469563001; Thu, 18 Jun 2020 01:39:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592469562; cv=none; d=google.com; s=arc-20160816; b=HURpoujHxPjK83ybMTLbR2ydE3+JgywshJc3wEYuDQvRb+EluTajylEJCtpjlC6irq DJ+9ViJwFgBft05sv9KgyAaZf0x3NDdnY2LiZkLwcMhsZRtnrf+9kdPfy4PrAH4g2APN 6T4sdfbnwdEaRbJ6BLTQPktKU0r25AbgEmODQD76tnfr5voNYNZQ+I8W3GwxIt367r9s omo7kM8F2Fw2x8EvMTHX7Lu9DcLuw4DK3yuHiO++JeR5SvsaFhSEwYCdJvaUaO/BkLuQ Pd6YCsmphlIzJJSfz39yvIveURmhXgl8tNYijEMJ/JZdj9wxq4GZBhQjiFcYjdpTNfXF y3Yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=NES0+Yk8OnWgH95/pv+pL4gMwYf8bdYustHRFZhhU/U=; b=Ov1+cqSSg7t5fwhWFGNN6MEMOyJ7kofWfwHeKkfWRjiJuIg01MDScYIIajjP/dh2SU BZ5HNUx4KWhliGnAAE9Lp4hS2DW7Up6t4T9AvdEUY/E0Ca1/1LVct7Zc2ZoHHe3PPVuv /t1lwYH93mmUzWtkDM0SYnr3wbx1C/AUbUJl/yMcLMurAnjDSuussqhP8OBUiEYg8H81 wZ7JPv6V0DCpWqVmfXoisR3CHHQUO0IKJEDaP2AAQbJCsY+til151IwL5I4chhYWviBZ eiuhSR02FGV10ofijB4Wev2mQSniyL2i2sghvyJKB2YRKPK25SOt40ghRXCZ+VrbnTxm euQw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id gu20si1531413ejb.13.2020.06.18.01.39.22; Thu, 18 Jun 2020 01:39:22 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728825AbgFRIjV (ORCPT + 6 others); Thu, 18 Jun 2020 04:39:21 -0400 Received: from mx.socionext.com ([202.248.49.38]:19356 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728823AbgFRIi1 (ORCPT ); Thu, 18 Jun 2020 04:38:27 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 18 Jun 2020 17:38:26 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 6B432180B51; Thu, 18 Jun 2020 17:38:26 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Thu, 18 Jun 2020 17:38:26 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 9911D1A12AD; Thu, 18 Jun 2020 17:38:25 +0900 (JST) From: Kunihiko Hayashi To: Bjorn Helgaas , Lorenzo Pieralisi , Jingoo Han , Gustavo Pimentel , Rob Herring , Masahiro Yamada , Marc Zyngier Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH v5 3/6] dt-bindings: PCI: uniphier: Add iATU register description Date: Thu, 18 Jun 2020 17:38:10 +0900 Message-Id: <1592469493-1549-4-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1592469493-1549-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1592469493-1549-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In the dt-bindings, "atu" reg-names is required to get the register space for iATU in Synopsys DWC version 4.80 or later. Signed-off-by: Kunihiko Hayashi Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/uniphier-pcie.txt | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt index 1fa2c59..c4b7381 100644 --- a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt +++ b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt @@ -16,6 +16,7 @@ Required properties: "dbi" - controller configuration registers "link" - SoC-specific glue layer registers "config" - PCIe configuration space + "atu" - iATU registers for DWC version 4.80 or later - clocks: A phandle to the clock gate for PCIe glue layer including the host controller. - resets: A phandle to the reset line for PCIe glue layer including