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Wed, 20 May 2020 02:14:42 +0000 From: peng.fan@nxp.com To: shawnguo@kernel.org, fabio.estevam@nxp.com, kernel@pengutronix.de, aisheng.dong@nxp.com, robh+dt@kernel.org, sboyd@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, leonard.crestez@nxp.com, daniel.baluta@nxp.com, l.stach@pengutronix.de, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Peng Fan Subject: [PATCH 1/3] arm64: dts: imx8m: add mu node Date: Wed, 20 May 2020 10:04:36 +0800 Message-Id: <1589940278-3680-2-git-send-email-peng.fan@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1589940278-3680-1-git-send-email-peng.fan@nxp.com> References: <1589940278-3680-1-git-send-email-peng.fan@nxp.com> X-ClientProxiedBy: SG2PR0601CA0011.apcprd06.prod.outlook.com (2603:1096:3::21) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR0601CA0011.apcprd06.prod.outlook.com (2603:1096:3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3000.25 via Frontend Transport; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++++ arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +++++++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++ 3 files changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index f3bbefe3e59f..9722f76d8c3f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -771,6 +771,15 @@ status = "disabled"; }; + mu: mailbox@30aa0000 { + compatible = "fsl,imx6sx-mu"; + reg = <0x30aa0000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_MU_ROOT>; + clock-names = "mu"; + #mbox-cells = <2>; + }; + usdhc1: mmc@30b40000 { compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b40000 0x10000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index fb63a98fdff5..5f30f1d50460 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -671,6 +671,15 @@ status = "disabled"; }; + mu: mailbox@30aa0000 { + compatible = "fsl,imx6sx-mu"; + reg = <0x30aa0000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MN_CLK_MU_ROOT>; + clock-names = "mu"; + #mbox-cells = <2>; + }; + usdhc1: mmc@30b40000 { compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b40000 0x10000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 1d15680a4962..e969fcbbd15f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -956,6 +956,15 @@ status = "disabled"; }; + mu: mailbox@30aa0000 { + compatible = "fsl,imx6sx-mu"; + reg = <0x30aa0000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MQ_CLK_MU_ROOT>; + clock-names = "mu"; + #mbox-cells = <2>; + }; + usdhc1: mmc@30b40000 { compatible = "fsl,imx8mq-usdhc", "fsl,imx7d-usdhc";