From patchwork Fri Mar 13 09:34:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 203374 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3FC6C4CECE for ; Fri, 13 Mar 2020 09:35:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C9F712074C for ; Fri, 13 Mar 2020 09:35:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Pq1EpJIG" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726715AbgCMJek (ORCPT ); Fri, 13 Mar 2020 05:34:40 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:16861 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726364AbgCMJej (ORCPT ); Fri, 13 Mar 2020 05:34:39 -0400 X-UUID: a84b3941202a470a9540f25eed6e7d47-20200313 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=kO25H1emR15qgYn4QcDNUz+M/XfUisv1uNSv5VIntVQ=; b=Pq1EpJIG0xrvZ0p4p7BgY5qU/1j4Jvnua7D57BVcojZHCABXFbeapKbOtpSYhRq0is2YxBPr8uVERI4F6g0BlYCZd2pC/scKc246YC8L7ZI6kZpzQxTRjnaCDq/pG2GEAusDXNmmaS/FwYqe+pCcwRcahdtlgcHs7axRpmc1f0c=; X-UUID: a84b3941202a470a9540f25eed6e7d47-20200313 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 981195548; Fri, 13 Mar 2020 17:34:31 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 13 Mar 2020 17:32:56 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 13 Mar 2020 17:33:41 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , , , Henry Chen Subject: [PATCH V4 05/13] soc: mediatek: add header for mediatek SIP interface Date: Fri, 13 Mar 2020 17:34:18 +0800 Message-ID: <1584092066-24425-6-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1584092066-24425-1-git-send-email-henryc.chen@mediatek.com> References: <1584092066-24425-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: D023FFB3E18CAA474D3E3468F12CDD7C97DD3C90292E266EFC763F850B5EE36A2000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a header to collect SIPs and add one SIP call to initialize power management hardware for the SIP interface defined to access the SPM handling vcore voltage and ddr rate changes on mt8183 (and most likely later socs). Signed-off-by: Henry Chen --- include/soc/mediatek/mtk_sip.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 include/soc/mediatek/mtk_sip.h -- 1.9.1 diff --git a/include/soc/mediatek/mtk_sip.h b/include/soc/mediatek/mtk_sip.h new file mode 100644 index 0000000..945fc72 --- /dev/null +++ b/include/soc/mediatek/mtk_sip.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (c) 2018 MediaTek Inc. + */ +#ifndef __SOC_MTK_SIP_H +#define __SOC_MTK_SIP_H + +#ifdef CONFIG_ARM64 +#define MTK_SIP_SMC_AARCH_BIT 0x40000000 +#else +#define MTK_SIP_SMC_AARCH_BIT 0x00000000 +#endif + +#define MTK_SIP_SPM (0x82000506 | MTK_SIP_SMC_AARCH_BIT) +#define MTK_SIP_SPM_DVFSRC_INIT 0x00 + +#endif