From patchwork Fri Mar 13 09:34:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 203376 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4ED21C10DCE for ; Fri, 13 Mar 2020 09:34:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 20A5A2073E for ; Fri, 13 Mar 2020 09:34:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="jMDHoSua" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726364AbgCMJet (ORCPT ); Fri, 13 Mar 2020 05:34:49 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:9371 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726776AbgCMJeq (ORCPT ); Fri, 13 Mar 2020 05:34:46 -0400 X-UUID: d69af70e3c404db689fcbeda2af74603-20200313 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=C2PWodz3tfyBIHdMG1iwzdeDsm+xbRlWsBEle44812Y=; b=jMDHoSuaDaZHuuzVML7jI+Id3gORA72q1BFNzSa+Xg+n5YELKTCtS03OzJ/3QgHN9QGsZV6nmwTDNhsFjFJyAM03oC4Y4D8T/PZuZOK3gvlo639vCthPD0DSnqDlcHNqqG5B5a84EOfA8s+LHs4/76wF4OvqztmTGRB690h7zaU=; X-UUID: d69af70e3c404db689fcbeda2af74603-20200313 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 761692425; Fri, 13 Mar 2020 17:34:31 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 13 Mar 2020 17:33:30 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 13 Mar 2020 17:33:40 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , , , , , , , Henry Chen Subject: [PATCH V4 02/13] dt-bindings: soc: Add opp table on scpsys bindings Date: Fri, 13 Mar 2020 17:34:15 +0800 Message-ID: <1584092066-24425-3-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1584092066-24425-1-git-send-email-henryc.chen@mediatek.com> References: <1584092066-24425-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add opp table on scpsys dt-bindings for Mediatek SoC. Signed-off-by: Henry Chen Reviewed-by: Rob Herring --- .../devicetree/bindings/soc/mediatek/scpsys.txt | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) -- 1.9.1 diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt index 1baaa6f..d22f11d 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt @@ -70,6 +70,10 @@ Optional properties: - mfg_2d-supply: Power supply for the mfg_2d power domain - mfg-supply: Power supply for the mfg power domain +- operating-points-v2: Phandle to the OPP table for the Power domain. + Refer to Documentation/devicetree/bindings/power/power_domain.txt + and Documentation/devicetree/bindings/opp/opp.txt for more details + Example: scpsys: scpsys@10006000 { @@ -82,6 +86,27 @@ Example: <&topckgen CLK_TOP_VENC_SEL>, <&topckgen CLK_TOP_VENC_LT_SEL>; clock-names = "mfg", "mm", "venc", "venc_lt"; + operating-points-v2 = <&dvfsrc_opp_table>; + + dvfsrc_opp_table: opp-table { + compatible = "operating-points-v2-level"; + + dvfsrc_vol_min: opp1 { + opp,level = ; + }; + + dvfsrc_freq_medium: opp2 { + opp,level = ; + }; + + dvfsrc_freq_max: opp3 { + opp,level = ; + }; + + dvfsrc_vol_max: opp4 { + opp,level = ; + }; + }; }; Example consumer: @@ -89,4 +114,21 @@ Example consumer: afe: mt8173-afe-pcm@11220000 { compatible = "mediatek,mt8173-afe-pcm"; power-domains = <&scpsys MT8173_POWER_DOMAIN_AUDIO>; + operating-points-v2 = <&aud_opp_table>; + }; + + aud_opp_table: aud-opp-table { + compatible = "operating-points-v2"; + opp1 { + opp-hz = /bits/ 64 <793000000>; + required-opps = <&dvfsrc_vol_min>; + }; + opp2 { + opp-hz = /bits/ 64 <910000000>; + required-opps = <&dvfsrc_vol_max>; + }; + opp3 { + opp-hz = /bits/ 64 <1014000000>; + required-opps = <&dvfsrc_vol_max>; + }; };