From patchwork Tue Mar 3 10:58:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dennis YC Hsieh X-Patchwork-Id: 203894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 294B5C3F2CD for ; Tue, 3 Mar 2020 10:59:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 053D520838 for ; Tue, 3 Mar 2020 10:59:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="utzUNipm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728921AbgCCK7B (ORCPT ); Tue, 3 Mar 2020 05:59:01 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:40631 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728304AbgCCK65 (ORCPT ); Tue, 3 Mar 2020 05:58:57 -0500 X-UUID: 0cbe5b52ca504fdeb1940224d5785c8d-20200303 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=eLK55L0fZn7XN3zfsQBv7sALD9rbgqr0/O+Yq+Tslao=; b=utzUNipmqmCR8e5SWtwTqvU0kvmHNRmDsT1PHwmJ6264cUnqZrbvOYVbCN6cc45m1083ZvAveuxfjH3DeaB0CxOKe9lATjweBz/S7ZqPrgrtzYYZfxgrNW5lE2ulgqFp8QwmFwdKobotUqVrH/A8ZJtxS+OiMiHY1fJJOYDbjBc=; X-UUID: 0cbe5b52ca504fdeb1940224d5785c8d-20200303 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1388856979; Tue, 03 Mar 2020 18:58:48 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 3 Mar 2020 18:57:41 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 3 Mar 2020 18:58:11 +0800 From: Dennis YC Hsieh To: Rob Herring , Mark Rutland , Matthias Brugger , Jassi Brar , Philipp Zabel , David Airlie , Daniel Vetter CC: , , , , , Bibby Hsieh , CK Hu , Houlong Wei , , HS Liao , Dennis YC Hsieh Subject: [PATCH v4 07/13] soc: mediatek: cmdq: add write_s function Date: Tue, 3 Mar 2020 18:58:39 +0800 Message-ID: <1583233125-7827-8-git-send-email-dennis-yc.hsieh@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1583233125-7827-1-git-send-email-dennis-yc.hsieh@mediatek.com> References: <1583233125-7827-1-git-send-email-dennis-yc.hsieh@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org add write_s function in cmdq helper functions which writes value contains in internal register to address with large dma access support. Signed-off-by: Dennis YC Hsieh Reviewed-by: CK Hu --- drivers/soc/mediatek/mtk-cmdq-helper.c | 34 +++++++++++++++++++++++- include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++ include/linux/soc/mediatek/mtk-cmdq.h | 20 ++++++++++++++ 3 files changed, 55 insertions(+), 1 deletion(-) -- 2.18.0 diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 33153d17c9d9..90f1ff2b4b00 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -18,6 +18,10 @@ struct cmdq_instruction { union { u32 value; u32 mask; + struct { + u16 arg_c; + u16 src_reg; + }; }; union { u16 offset; @@ -29,7 +33,7 @@ struct cmdq_instruction { struct { u8 sop:5; u8 arg_c_t:1; - u8 arg_b_t:1; + u8 src_t:1; u8 dst_t:1; }; }; @@ -222,6 +226,34 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, } EXPORT_SYMBOL(cmdq_pkt_write_mask); +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, + u16 addr_low, u16 src_reg_idx, u32 mask) +{ + struct cmdq_instruction inst = { {0} }; + int err; + + if (mask != U32_MAX) { + inst.op = CMDQ_CODE_MASK; + inst.mask = ~mask; + err = cmdq_pkt_append_command(pkt, inst); + if (err < 0) + return err; + + inst.mask = 0; + inst.op = CMDQ_CODE_WRITE_S_MASK; + } else { + inst.op = CMDQ_CODE_WRITE_S; + } + + inst.src_t = CMDQ_REG_TYPE; + inst.sop = high_addr_reg_idx; + inst.offset = addr_low; + inst.src_reg = src_reg_idx; + + return cmdq_pkt_append_command(pkt, inst); +} +EXPORT_SYMBOL(cmdq_pkt_write_s); + int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event) { struct cmdq_instruction inst = { {0} }; diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h index 121c3bb6d3de..8ef87e1bd03b 100644 --- a/include/linux/mailbox/mtk-cmdq-mailbox.h +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h @@ -59,6 +59,8 @@ enum cmdq_code { CMDQ_CODE_JUMP = 0x10, CMDQ_CODE_WFE = 0x20, CMDQ_CODE_EOC = 0x40, + CMDQ_CODE_WRITE_S = 0x90, + CMDQ_CODE_WRITE_S_MASK = 0x91, CMDQ_CODE_LOGIC = 0xa0, }; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 83340211e1d3..c72d826d8934 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -12,6 +12,8 @@ #include #define CMDQ_NO_TIMEOUT 0xffffffffu +#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) +#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) struct cmdq_pkt; @@ -102,6 +104,24 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value, u32 mask); +/** + * cmdq_pkt_write_s() - append write_s command to the CMDQ packet + * @pkt: the CMDQ packet + * @high_addr_reg_idx: internal regisger ID which contains high address of pa + * @addr_low: low address of pa + * @src_reg_idx: the CMDQ internal register ID which cache source value + * @mask: the specified target address mask, use U32_MAX if no need + * + * Return: 0 for success; else the error code is returned + * + * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH() + * to get high addrees and call cmdq_pkt_assign() to assign value into internal + * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameterwhen + * call to this function. + */ +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, + u16 addr_low, u16 src_reg_idx, u32 mask); + /** * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet * @pkt: the CMDQ packet