From patchwork Tue Jun 11 12:25:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 166442 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2293300ilk; Tue, 11 Jun 2019 05:26:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqy1G0gX45r4y2Brw3OTsd9fhVRaNcMIIDkxz3jd82ZyMsO/O+pfsj6jXZGWI1mr5uqDBCJc X-Received: by 2002:a62:ed0a:: with SMTP id u10mr47090940pfh.243.1560255972981; Tue, 11 Jun 2019 05:26:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560255972; cv=none; d=google.com; s=arc-20160816; b=ZnCIu33ewAElN30k1+Tt4G2QkG/V204noGBWI61ru+BmE3PMF8+MEg/Yo5k8f04fMd VdeQR200xWcxFcv+IBtGFAZodoCAs2bC19R8+IwbsY1CUS5NKJWNSryqWDMg1O42BLf8 wgeYnBwQdKiQyb3Z7RXQtzHj8VKv1w9FXY+6g5d8GDGIVP3yqdhVnZm0Kc8umaa57gc3 Ss6T10oic4h1PJsMy08T0ADzyWoc5P4izteis7R6RDEdhXtK5NrOskqOo0eIDhqtMh7J jDPvGlPGZ/ph1qoDNyRwwiyGemqndqBjC7sNed7/+T3XJlE/v2f8EZD+ychhpDte/Y6D 3pQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=7dQ+9lqtmTtedvp/b3rgO/AqPLUdhqousiUICsfwmlU=; b=vO4jSXtlWHbD8sURqUg/ernhiY0oGR6JEhfFB+zYgomOlHSbIzzNO2txSpNpEGT+zh me8TzlTL5lgaGcXWPeKdUzurVGZGdvNz/NjQU0XBcRN2+gFYsaDWEs7jH8DKtGTsWAkQ nXnd5c10JNkCYHFJVx6r5KgKuKXGj/xc8CFyNQyAT5IlUbV+Zzf+K1YZ6XV+O6+PeVMc 4pZMzwwZpj0OKc7b0vS/k6O3AqFrZWKf/MSJmDz3Bk8oW++JDnsaYxOSzN/nhi3vsRGV QMxiKfqagEkbVVPA83BG6OisFbWSIrdCjIJRk7UWM8rufW1HwKEjIx1A0sZN1tnfEFDK hlsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b="nJ+GFYS/"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b2si3643635pgm.445.2019.06.11.05.26.12; Tue, 11 Jun 2019 05:26:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b="nJ+GFYS/"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390279AbfFKM0M (ORCPT + 8 others); Tue, 11 Jun 2019 08:26:12 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:40632 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389619AbfFKM0L (ORCPT ); Tue, 11 Jun 2019 08:26:11 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5BCN3H3024849; Tue, 11 Jun 2019 14:25:56 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=7dQ+9lqtmTtedvp/b3rgO/AqPLUdhqousiUICsfwmlU=; b=nJ+GFYS/tRfQ4m0vYKMLBcQatrCLLr5lZIoY3NS4LgabDMlfXSaJ7GYJTwFnvJb1pOJS HyivsLdSo0ghbNsIPEBvKZ04JlHY1PzioQgieZzdSZYvdtFgF0JSZKJ0U3peXZnuPtwx eApQ4RwJvpm7TfJPyJrpjU8b4TS0Q8QALZ/woHhFiDMSvhtyIYKG1W90tiKL8JuCxKN8 893dWu8+ECXqtJid9hO/jqswmA0pGf3bEnOIaQsSe7FWz2EfsVbsMZtYPMd6oRt9V8RU Qv4Wdj6SZLaDB3F/OT0sR4Gdw7MmwL1isyPmU7+yrZW1Gq8QrSe510zMgT5YX9yUEYY2 2g== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2t26rjsvb9-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 11 Jun 2019 14:25:56 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E1F9434; Tue, 11 Jun 2019 12:25:55 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C87ED2A29; Tue, 11 Jun 2019 12:25:55 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:55 +0200 Received: from localhost (10.201.23.31) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:54 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" , Rob Herring , "Mark Rutland" CC: , , , , , Erwan Le Ray , "Fabrice Gasnier" , Bich Hemon Subject: [PATCH v2 07/10] ARM: dts: stm32: update uart4 pin configurations for low power Date: Tue, 11 Jun 2019 14:25:27 +0200 Message-ID: <1560255930-22554-8-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560255930-22554-1-git-send-email-erwan.leray@st.com> References: <1560255930-22554-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-11_06:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently, pinctrl states defines only one "sleep" configuration for pins, no matter the possible uart low power modes (Rx pin always kept active). Sleep pin configuration is refined for low power modes: - "sleep" (no wakeup & console suspend enabled): put pins in analog state to optimize power - "idle" (wakeup capability): keep Rx pin in alternate function - "default" state remains untouched, to be used while the UART is active or in case the no_console_suspend mode is enabled Signed-off-by: Bich Hemon Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi index 85c417d..2e1ab1b 100644 --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi @@ -599,6 +599,23 @@ bias-disable; }; }; + + uart4_idle_pins_a: uart4-idle-0 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_a: uart4-sleep-0 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; }; pinctrl_z: pin-controller-z@54004000 {