From patchwork Thu Apr 25 10:41:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sugaya Taichi X-Patchwork-Id: 162844 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1763508jan; Thu, 25 Apr 2019 03:41:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqx6TG4X4z8s+1rrykmSoWC0rEtGjLx/yG7zApWaaIWAMO1eocIR6/yafkgqTmqF1Ghv0neN X-Received: by 2002:a65:4302:: with SMTP id j2mr35967600pgq.291.1556188868010; Thu, 25 Apr 2019 03:41:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556188868; cv=none; d=google.com; s=arc-20160816; b=VsLnjVGY6LQl9HeBxyXhl2mYxfGlG7yOzgtNtj962LNqjXfeMaXxB7cFdQM1JC2rMj z47Rct+8p2jtp+nABZ8tj3uDx6Dqpg8ZszlOprNS2MR575emKYiJWkchGNUbe61fMnpd 3IPOMOvNTnJz6AddF+e6TebltUYWF6Hwbdm86U94seIrz1IRFxc2R/1SMN91SXQy4tGq t+0EPOneJj1h2UJDErnoQi03UV98NaAGeQsVbS8yfVt7je4hvkSv/hSO1D92A3yjz2g1 6N352+BM3VB6mGcc6Ap1UErHbYWuUS1WPfmbWPIFhAHqkd3uQ297HKsgKZaPDeklzCRp LHBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=+EZevRocAJhRppLALeSKrxw6/2WOgC4d4lHp5pzfbBA=; b=jU8+kOS3wpiCA9kpgmApNo3tmp/8GUJhiUVIAqws1bY0fVm2YwmDv42jDNRDQkBTqA uzjC99zN9Oe15iK33WFjaICuMyucqELcxKeL8N8i6KEVB2S3JGopEv/mDI99YSX+aZIH 9h38GsNIiVT5cvoJf8wEALTwRlHkqzjIhUWJ8ZqDn1yu8Pv3PlSDUIVpd2f8QxSDEUWW jn3xcD3HD5ylS6SSi9G1AhP4q/idW1cwjQOo0aakQ3JaIs8b1/5OzCDviBm1JWajXq9D SF+LiCm6eUFsKvs6QqbzXFHiZpuzpHEgWTDT9mLlUfAO7krR2vb0r3LSqx6HJa+kiefQ 8cEA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ba5si21232147plb.24.2019.04.25.03.41.07; Thu, 25 Apr 2019 03:41:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730441AbfDYKlH (ORCPT + 7 others); Thu, 25 Apr 2019 06:41:07 -0400 Received: from mx.socionext.com ([202.248.49.38]:5354 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730440AbfDYKlG (ORCPT ); Thu, 25 Apr 2019 06:41:06 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 25 Apr 2019 19:40:55 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id F28B2180BD5; Thu, 25 Apr 2019 19:40:55 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Thu, 25 Apr 2019 19:40:55 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by kinkan.css.socionext.com (Postfix) with ESMTP id C62AD1A04E0; Thu, 25 Apr 2019 19:40:55 +0900 (JST) Received: from M20VSDK.e01.socionext.com (unknown [10.213.118.34]) by yuzu.css.socionext.com (Postfix) with ESMTP id AF2EC121BD0; Thu, 25 Apr 2019 19:40:55 +0900 (JST) From: Sugaya Taichi To: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Cc: Takao Orito , Kazuhiro Kasai , Shinji Kanematsu , Jassi Brar , Masami Hiramatsu , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Sugaya Taichi Subject: [PATCH v3 3/3] ARM: dts: milbeaut: Add a clk node for Milbeaut M10V Date: Thu, 25 Apr 2019 19:41:02 +0900 Message-Id: <1556188862-22546-4-git-send-email-sugaya.taichi@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1556188862-22546-1-git-send-email-sugaya.taichi@socionext.com> References: <1556188862-22546-1-git-send-email-sugaya.taichi@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a clk node for Milbeaut M10V. Signed-off-by: Sugaya Taichi --- arch/arm/boot/dts/milbeaut-m10v.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) -- 1.9.1 diff --git a/arch/arm/boot/dts/milbeaut-m10v.dtsi b/arch/arm/boot/dts/milbeaut-m10v.dtsi index aa7c6ca..5428bd9 100644 --- a/arch/arm/boot/dts/milbeaut-m10v.dtsi +++ b/arch/arm/boot/dts/milbeaut-m10v.dtsi @@ -65,6 +65,13 @@ <0x1d002000 0x1000>; /* CPU I/f base and size */ }; + clk: m10v-clock-ctrl@1d021000 { + compatible = "socionext,milbeaut-m10v-ccu"; + #clock-cells = <1>; + reg = <0x1d021000 0x1000>; + clocks = <&uclk40xi>; + }; + timer@1e000050 { /* 32-bit Reload Timers */ compatible = "socionext,milbeaut-timer"; reg = <0x1e000050 0x20>;