From patchwork Wed Feb 27 04:51:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sugaya Taichi X-Patchwork-Id: 159259 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp4002811jad; Tue, 26 Feb 2019 20:51:17 -0800 (PST) X-Google-Smtp-Source: AHgI3IY0EFB1CrA7k9w39Vq/FjMA8/DfJvEwWq0n7/PBLnN5ePBMoJwtnnQCN6cA3hr9qG1TOs9s X-Received: by 2002:aa7:8186:: with SMTP id g6mr29991044pfi.138.1551243077433; Tue, 26 Feb 2019 20:51:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551243077; cv=none; d=google.com; s=arc-20160816; b=bF/zBBzK4bUW2eN3pRaIVrZQek+GR64BSg2hCLBNIti2SUbVtbs1yZHDNiG4k7+JK2 araTMkFX+oRdigu4/gO+HxO2zilFchijjcXGWnkDZ9ZEcBS6o4mEZ8sV3kj2soxRoT0H yiVAwREOF2mg6PFlkCAiHv057/BTlYdGiTFLazNvZg8s5NJwoG+t2cstjChjLUEocAVT IOHz95q3+XkkNlFZyQkND9tb9rQOV5xfQCd72qtJhQ6hxVROnrExLNVOfO5oD5CP9kdT QiWN5YRqX4PeHSsDulm52Muuzpi2zOUj92nH2RcPpsmpZ+PxRAC7uza0n1EshTqb50az Uoyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=6DlJUg6IdiLF7gTILSJH+0w7MmsoeqZA9rDoFwZ+iF4=; b=NMqyCAiXJh4ZbZSnU6XNJWkeEXi3NxQYFMMx/lvE+Ik5KCQ7L18mAY1gR8v3ZxtleI zs8VUdzIvCdbhjghRkf0foySBG0djL0qtphGYEsKtj2TnvVMmUYzWN9m8YdUhsEDnagO zSWUm7k6v7tUq75hSz9whINfKiYU2dqBHedDQdOmNcx2r302DbtsHYeU1EuW86SJx4iX p+9XoxzvJOqbyP4CqyNnb1YdutnlrwHSqqtoZAleKiIOxXSOxiVa3/U3BN5EWsE9JKsv cRfonV2BGJooFtB/Sp3n03ivTxP0KcRku2kwEj5REasFvAN/bH5Xo4STyrFpHxhMjTAF UXRw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 3si2477061plz.116.2019.02.26.20.51.17; Tue, 26 Feb 2019 20:51:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729570AbfB0EvQ (ORCPT + 7 others); Tue, 26 Feb 2019 23:51:16 -0500 Received: from mx.socionext.com ([202.248.49.38]:30980 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729274AbfB0EvQ (ORCPT ); Tue, 26 Feb 2019 23:51:16 -0500 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 27 Feb 2019 13:51:14 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id 62FB96117D; Wed, 27 Feb 2019 13:51:14 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Wed, 27 Feb 2019 13:51:14 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by kinkan.css.socionext.com (Postfix) with ESMTP id BE4751A04E1; Wed, 27 Feb 2019 13:51:13 +0900 (JST) Received: from M20VSDK.e01.socionext.com (unknown [10.213.118.34]) by yuzu.css.socionext.com (Postfix) with ESMTP id 5B7E3121B6C; Wed, 27 Feb 2019 13:51:13 +0900 (JST) From: Sugaya Taichi To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Cc: Rob Herring , Mark Rutland , Takao Orito , Kazuhiro Kasai , Shinji Kanematsu , Jassi Brar , Masami Hiramatsu , Sugaya Taichi Subject: [PATCH v4 01/10] dt-bindings: sram: milbeaut: Add binding for Milbeaut smp-sram Date: Wed, 27 Feb 2019 13:51:49 +0900 Message-Id: <1551243109-10559-1-git-send-email-sugaya.taichi@socionext.com> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Milbeaut M10V SoC needs a part of sram for smp, so this adds the M10V sram compatible and binding. Signed-off-by: Sugaya Taichi Reviewed-by: Rob Herring --- .../devicetree/bindings/sram/milbeaut-smp-sram.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt -- 1.9.1 diff --git a/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt b/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt new file mode 100644 index 0000000..194f6a3 --- /dev/null +++ b/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt @@ -0,0 +1,24 @@ +Milbeaut SRAM for smp bringup + +Milbeaut SoCs use a part of the sram for the bringup of the secondary cores. +Once they get powered up in the bootloader, they stay at the specific part +of the sram. +Therefore the part needs to be added as the sub-node of mmio-sram. + +Required sub-node properties: +- compatible : should be "socionext,milbeaut-smp-sram" + +Example: + + sram: sram@0 { + compatible = "mmio-sram"; + reg = <0x0 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x10000>; + + smp-sram@f100 { + compatible = "socionext,milbeaut-smp-sram"; + reg = <0xf100 0x20>; + }; + };