From patchwork Wed Feb 20 07:43:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sugaya Taichi X-Patchwork-Id: 158795 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4612752jaa; Tue, 19 Feb 2019 23:42:42 -0800 (PST) X-Google-Smtp-Source: AHgI3IYhrTOcG43A4HL4wgKEahZkklxM5QPnKH4BxNIUzvEMvIHl24PfXz+aCtrLrmnCKS7KkjZt X-Received: by 2002:a17:902:6a83:: with SMTP id n3mr9331388plk.313.1550648562642; Tue, 19 Feb 2019 23:42:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550648562; cv=none; d=google.com; s=arc-20160816; b=Ux5F8lmb3BYcrqEjEBmtI5lhmU8SIpckZhSug0PyvCNA3Prm6PTl8uD0zAWJk59K52 bUP2q8GT6cnIvj9h1VZ0VHZp92zBDgR41wBh6P/NTkThJUMrvRzppVmoHyTWFob6A7Ud 3/MsIle+yON9IsjDY/wD7g5C3nrc0DESMh3I4B3dONf9b1QTn3En8rpWB9RS3E4yo9jp 7TvD/WIWn+ZRzNiKZVKcFGpAHe9c18TEajVAPrG65hj2hzTmVtZD+QYoyOvFKm9gmpiX I7P0OxGLJkebQiKILCnv1O7v/jcjzg4TIJymQSOEaUSEo88YAC0bgCIRFY1ozhohs80W EKIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=6DlJUg6IdiLF7gTILSJH+0w7MmsoeqZA9rDoFwZ+iF4=; b=QreNjaIRyhAO27qPvdPLfKySktNgkUHbJyB6GYCKAiEsXp+0kk3L5eK32vZb1yqoIU LxZ8CgfpHRXygjzRRbyqx17qPYHNSzGlLNcBbQEkrvWTpIZw9Tai8BcxnmcxqlG+HApf mO6j2/aPdg+UTXk6wYUD+HENAPXDH2lWAzJRfbLdEzbebNCo6idsAOBuhKyOzpGDAgvW sGSXgE1fwdSLgP/wbaqS23UsmKKjejFdbYgGw3muzbb6dLlyXB6b4NYa24TQvazO3Epw Uw68KNIwHFyAKqBhAlPYrxGjQA2ML05vEBjQw63vn0oL/OSHaGtJAyPnm7R35KM0g1FW VUCA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b17si7464725pls.181.2019.02.19.23.42.42; Tue, 19 Feb 2019 23:42:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725883AbfBTHml (ORCPT + 7 others); Wed, 20 Feb 2019 02:42:41 -0500 Received: from mx.socionext.com ([202.248.49.38]:4075 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725379AbfBTHml (ORCPT ); Wed, 20 Feb 2019 02:42:41 -0500 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 20 Feb 2019 16:42:39 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id C727B6117D; Wed, 20 Feb 2019 16:42:39 +0900 (JST) Received: from 172.31.9.53 (172.31.9.53) by m-FILTER with ESMTP; Wed, 20 Feb 2019 16:42:39 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by iyokan.css.socionext.com (Postfix) with ESMTP id 3BCED40368; Wed, 20 Feb 2019 16:42:39 +0900 (JST) Received: from M20VSDK.e01.socionext.com (unknown [10.213.118.34]) by yuzu.css.socionext.com (Postfix) with ESMTP id 23959120459; Wed, 20 Feb 2019 16:42:39 +0900 (JST) From: Sugaya Taichi To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Cc: Rob Herring , Mark Rutland , Takao Orito , Kazuhiro Kasai , Shinji Kanematsu , Jassi Brar , Masami Hiramatsu , Sugaya Taichi Subject: [PATCH v3 1/9] dt-bindings: sram: milbeaut: Add binding for Milbeaut smp-sram Date: Wed, 20 Feb 2019 16:43:18 +0900 Message-Id: <1550648598-10192-1-git-send-email-sugaya.taichi@socionext.com> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Milbeaut M10V SoC needs a part of sram for smp, so this adds the M10V sram compatible and binding. Signed-off-by: Sugaya Taichi Reviewed-by: Rob Herring --- .../devicetree/bindings/sram/milbeaut-smp-sram.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt -- 1.9.1 diff --git a/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt b/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt new file mode 100644 index 0000000..194f6a3 --- /dev/null +++ b/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt @@ -0,0 +1,24 @@ +Milbeaut SRAM for smp bringup + +Milbeaut SoCs use a part of the sram for the bringup of the secondary cores. +Once they get powered up in the bootloader, they stay at the specific part +of the sram. +Therefore the part needs to be added as the sub-node of mmio-sram. + +Required sub-node properties: +- compatible : should be "socionext,milbeaut-smp-sram" + +Example: + + sram: sram@0 { + compatible = "mmio-sram"; + reg = <0x0 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x10000>; + + smp-sram@f100 { + compatible = "socionext,milbeaut-smp-sram"; + reg = <0xf100 0x20>; + }; + };