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[81.47.145.58]) by smtp.gmail.com with ESMTPSA id h12sm28878113wma.48.2018.12.17.01.46.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Dec 2018 01:46:46 -0800 (PST) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, sboyd@kernel.org, will.deacon@arm.com, mturquette@baylibre.com, jassisinghbrar@gmail.com Cc: bjorn.andersson@linaro.org, vkoul@kernel.org, niklas.cassel@linaro.org, sibis@codeaurora.org, georgi.djakov@linaro.org, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH 06/13] clk: qcom: hfpll: get parent clock names from DT Date: Mon, 17 Dec 2018 10:46:23 +0100 Message-Id: <1545039990-19984-7-git-send-email-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1545039990-19984-1-git-send-email-jorge.ramirez-ortiz@linaro.org> References: <1545039990-19984-1-git-send-email-jorge.ramirez-ortiz@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Allow accessing the parent clock name required for the driver operation using the device tree node. This permits extending the driver to other platforms without having to modify its source code. For backwards compatibility leave the previous value as default. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz --- drivers/clk/qcom/hfpll.c | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.7.4 Reviewed-by: Bjorn Andersson diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c index a6de7101..87b7f46 100644 --- a/drivers/clk/qcom/hfpll.c +++ b/drivers/clk/qcom/hfpll.c @@ -52,6 +52,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev) void __iomem *base; struct regmap *regmap; struct clk_hfpll *h; + struct clk *pclk; struct clk_init_data init = { .parent_names = (const char *[]){ "xo" }, .num_parents = 1, @@ -75,6 +76,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev) 0, &init.name)) return -ENODEV; + /* get parent clock from device tree (optional) */ + pclk = devm_clk_get(dev, "xo"); + if (!IS_ERR(pclk)) + init.parent_names = (const char *[]){ __clk_get_name(pclk) }; + else if (PTR_ERR(pclk) == -EPROBE_DEFER) + return -EPROBE_DEFER; + h->d = &hdata; h->clkr.hw.init = &init; spin_lock_init(&h->lock);