From patchwork Tue Oct 2 11:12:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 147970 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp5014356lji; Tue, 2 Oct 2018 04:12:24 -0700 (PDT) X-Google-Smtp-Source: ACcGV602JvIlGIpDEtR77qypYLnsLfVti11eXklIrKNpH6L/G0re7y7UP2I3cUTyvlQMMHRtFTuW X-Received: by 2002:a62:d206:: with SMTP id c6-v6mr15949191pfg.8.1538478744535; Tue, 02 Oct 2018 04:12:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538478744; cv=none; d=google.com; s=arc-20160816; b=BbISkDqZu6Y80XWpJ72/9ddIM/nV6PkEgktbA91ToL05xueX+RHLwSFpVQifmIxAyj 2bOeyqh5uTFvQZgDb6av2BphUOlcnCEkPX88Z88fuq6PI3ifpgJ2aEoEJA6R6/E8sbfA eTFANscmNhAtpbOxb772p/RsxkVGqmy6DuR8SZlKqWb2FgZ6SlV381JRKACajSBEDYHq GrvkuPIYjHDRMujtROnPBwCnIHGMPhFuUB8mcFYUxff7R5jOgQBwagpaIy6EZMqMJ8Lf UAL8/zteAo0rVJiF2E7SC85MazfHY6+6N7X9jzVddq/p1cuZ+g/pOn8SVB3Xw19syN/b 7yfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=NsJIRbQCUi0vJzffnG8ir3IV/xL+U7IGewfDDYOm/S8=; b=06hhXxkJCmKaJkQIRLf0S83YDPZmlJxQx8VpIHindIqx1SKNQhH12znXn/lbGJ5UK8 QDXwsCV7IFKcKbB6YgmQ1a6C3XxMbeiT/uSnXktUlDZpvcnHYviwb69UwpZ9luBNgWV5 WmvGDh32CEbqBAGPzy3z06DgxiXiHA2343e17dfVUULKG46ig/hv1GEQzn3PXMabmRnB tNpvwIjMS70DvGq97GP5tE++5CfdBUQfp85b+EGdzFDxkxXTWTTbqiqFSLPH9r33VQzd rjQysWDQ0n5heH17TUaqUSo33gqmikBhIlCU4mYYkooXWpjiC/VFzbIZYReM5YncnOBg cIuQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r205-v6si14676401pgr.634.2018.10.02.04.12.24; Tue, 02 Oct 2018 04:12:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727417AbeJBRzI (ORCPT + 6 others); Tue, 2 Oct 2018 13:55:08 -0400 Received: from mx.socionext.com ([202.248.49.38]:41970 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727411AbeJBRzI (ORCPT ); Tue, 2 Oct 2018 13:55:08 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 02 Oct 2018 20:12:22 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 94C8718010C; Tue, 2 Oct 2018 20:12:22 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 2 Oct 2018 20:12:22 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 1154D1A03A2; Tue, 2 Oct 2018 20:12:22 +0900 (JST) From: Kunihiko Hayashi To: Masahiro Yamada , linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH 2/4] ARM: dts: uniphier: Add USB2 phy nodes Date: Tue, 2 Oct 2018 20:12:00 +0900 Message-Id: <1538478722-20351-3-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538478722-20351-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1538478722-20351-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add nodes of USB2 physical layer for UniPhier SoC. This supports Pro4. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pro4.dtsi | 35 ++++++++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index b994494..4b2e291 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -269,6 +269,8 @@ <&mio_clk 12>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>; + phy-names = "usb"; + phys = <&usb_phy0>; has-transaction-translator; }; @@ -283,6 +285,8 @@ <&mio_clk 13>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>; + phy-names = "usb"; + phys = <&usb_phy1>; has-transaction-translator; }; @@ -294,6 +298,34 @@ pinctrl: pinctrl { compatible = "socionext,uniphier-pro4-pinctrl"; }; + + usb-phy { + compatible = "socionext,uniphier-pro4-usb2-phy"; + #address-cells = <1>; + #size-cells = <0>; + + usb_phy0: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + usb_phy1: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + + usb_phy2: phy@2 { + reg = <2>; + #phy-cells = <0>; + vbus-supply = <&usb0_vbus>; + }; + + usb_phy3: phy@3 { + reg = <3>; + #phy-cells = <0>; + vbus-supply = <&usb1_vbus>; + }; + }; }; soc-glue@5f900000 { @@ -397,7 +429,7 @@ clock-names = "ref", "bus_early", "suspend"; clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>; resets = <&usb0_rst 4>; - phys = <&usb0_ssphy>; + phys = <&usb_phy2>, <&usb0_ssphy>; dr_mode = "host"; }; @@ -450,6 +482,7 @@ clock-names = "ref", "bus_early", "suspend"; clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>; resets = <&usb1_rst 4>; + phys = <&usb_phy3>; dr_mode = "host"; };