From patchwork Wed Sep 19 05:28:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 146997 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp276344ljw; Tue, 18 Sep 2018 22:29:48 -0700 (PDT) X-Google-Smtp-Source: ANB0VdY9wxFS7fVRRcPk+RnEcgPOlN6BeN79pSs6tNr+3FjBa5SI7mdmPVGp/g7dGLkoXFwZRI2U X-Received: by 2002:a17:902:a716:: with SMTP id w22-v6mr32897666plq.334.1537334988343; Tue, 18 Sep 2018 22:29:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537334988; cv=none; d=google.com; s=arc-20160816; b=Yr6QjOS28/cyEKORDmCEs1STMRC2QWl9Cb2EGOaqKv2bDzNxarrHDia9ZZOS5/Dw16 ETio+kJZApbONzNFzWvHBVDoswMAMco5OCaxV+rmLYNJICU9fW8CNHGRohKeGTtbTWdN y8zn2X2yhlQyfjHhZkeFNAocG7MhKavf3DO9QVECT+4CFUj8hEN3H7svlSrCMnG87Elt tOn1x1O+4dRuriYzOsRvNxBqhtZ1SoIkohv53y6TPotDPXIUmPxnt1Y8zdmOWHBIDjix NJrd9daY+775savpWHd/zdDTKYOsuQfffrq43zvxbSxuq7XJVKmCjYJIMdP3Xvmhptrc q4kg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=SoZ4skRPOwPfKIZavVmUIpBmfwJ0sH8UkI1n+XllLT8=; b=K980IqJxS0dX+vfY0VCh0mEZLz3Oui0DcyQjbDKVGxCCq9p9AkF/0ua8YFWtPp+LHx 7Y2atMX126pyKYpcQ5KGb4F+Kepx1+RUjUu0LVpwRax3S729qc6YGBDKUez+LGMS2kV9 nJxCwKzMP7GHSz4CFqgMwPE2pa+w9frtfW+EV3m6scmk4M9xKe9Qzz5KQAmvXhVsb7Qk TB35p6Px6XCZaCMj/n+q12FCFXLFlw0cm4oNf2zQYtA2EfPQnm9PqVMM5I2aCOWKvHdg 7+l1uUOIJnj51s64uHrLrkl8hANJSXcKT1IgOzubMaeHFtGTRHG7ZIfMWW0/Z3uTJksM h5qg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=TY83L9Q9; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x3-v6si16866911plr.138.2018.09.18.22.29.48; Tue, 18 Sep 2018 22:29:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=TY83L9Q9; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730688AbeISLFv (ORCPT + 6 others); Wed, 19 Sep 2018 07:05:51 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:61316 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730700AbeISLFv (ORCPT ); Wed, 19 Sep 2018 07:05:51 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id w8J5Sefa016652; Wed, 19 Sep 2018 14:28:41 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com w8J5Sefa016652 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1537334922; bh=SoZ4skRPOwPfKIZavVmUIpBmfwJ0sH8UkI1n+XllLT8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TY83L9Q9kfvV2Z1Tj6xPspxa5jO95bx15wb8D77ogWQxrAy3v3H+Y+3p2fcZsbohv +li3FJCa7Tq5/8UvaZpfUZGoAfYBqtrtixDBOx+6z1GQLlSUXrWXTWdqLd+n1zHxwr 0myHRZikJrJjB6BLTVyV1Eg0LjHWOCbPVUDlYBqN4Is/3WyXJL7EfyqwP9IECqjPE/ pO2aThhTsesPFCa+89EIQWzofiEhPHVlUDG/Hvsu2TqOCa+00o85thkQ3+qr4vs5Ph 0XMxmzD0vpDnA+neaeyGfaivaLAG4PoIbU4KEGCPZvJf/dtp34zS9jCy0ty9HJybsn OAi1TEcL9xW1Q== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Greg KH , linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org, Rob Herring , Dai Okamura , Masahiro Yamada , Jiri Slaby , linux-kernel@vger.kernel.org, Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] serial: 8250_uniphier: remove unused "fifo-size" property Date: Wed, 19 Sep 2018 14:28:11 +0900 Message-Id: <1537334893-26079-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537334893-26079-1-git-send-email-yamada.masahiro@socionext.com> References: <1537334893-26079-1-git-send-email-yamada.masahiro@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The FIFO size of the UART devices is 64 on almost all UniPhier SoCs with the exception Pro4TV SoC (MN2WS0230), which used 128 FIFO size. However, Pro4TV SoC was never upstreamed, and out of production. So, this property has never been used in a useful way. Let's remove old unused code. Signed-off-by: Masahiro Yamada --- Documentation/devicetree/bindings/serial/uniphier-uart.txt | 4 ---- drivers/tty/serial/8250/8250_uniphier.c | 10 +--------- 2 files changed, 1 insertion(+), 13 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/serial/uniphier-uart.txt b/Documentation/devicetree/bindings/serial/uniphier-uart.txt index 0b3892a..811c479 100644 --- a/Documentation/devicetree/bindings/serial/uniphier-uart.txt +++ b/Documentation/devicetree/bindings/serial/uniphier-uart.txt @@ -6,9 +6,6 @@ Required properties: - interrupts: a single interrupt specifier. - clocks: phandle to the input clock. -Optional properties: -- fifo-size: the RX/TX FIFO size. Defaults to 64 if not specified. - Example: aliases { serial0 = &serial0; @@ -19,5 +16,4 @@ Example: reg = <0x54006800 0x40>; interrupts = <0 33 4>; clocks = <&uart_clk>; - fifo-size = <64>; }; diff --git a/drivers/tty/serial/8250/8250_uniphier.c b/drivers/tty/serial/8250/8250_uniphier.c index 28d88ccf..d292654 100644 --- a/drivers/tty/serial/8250/8250_uniphier.c +++ b/drivers/tty/serial/8250/8250_uniphier.c @@ -12,9 +12,6 @@ #include "8250.h" -/* Most (but not all) of UniPhier UART devices have 64-depth FIFO. */ -#define UNIPHIER_UART_DEFAULT_FIFO_SIZE 64 - /* * This hardware is similar to 8250, but its register map is a bit different: * - MMIO32 (regshift = 2) @@ -185,12 +182,6 @@ static int uniphier_of_serial_setup(struct device *dev, struct uart_port *port, port->uartclk = clk_get_rate(priv->clk); - /* Check for fifo size */ - if (of_property_read_u32(np, "fifo-size", &prop) == 0) - port->fifosize = prop; - else - port->fifosize = UNIPHIER_UART_DEFAULT_FIFO_SIZE; - return 0; } @@ -241,6 +232,7 @@ static int uniphier_uart_probe(struct platform_device *pdev) up.port.type = PORT_16550A; up.port.iotype = UPIO_MEM32; + up.port.fifosize = 64; up.port.regshift = UNIPHIER_UART_REGSHIFT; up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE; up.capabilities = UART_CAP_FIFO;