From patchwork Thu Feb 15 12:49:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 128422 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1711966ljc; Thu, 15 Feb 2018 04:51:26 -0800 (PST) X-Google-Smtp-Source: AH8x226Ng88/RcE28PfzhZnAaPLsmVSY1h0g7LtPl/EJdGVz5+YFcVVv0CmtZZCIUmpSszsq+8Qp X-Received: by 10.99.171.70 with SMTP id k6mr2189349pgp.355.1518699086209; Thu, 15 Feb 2018 04:51:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518699086; cv=none; d=google.com; s=arc-20160816; b=JVWc1AJnxjnBdE0+u993mqgZ2YXZDgYy0zU8b4DyAMoMtPJbTupABtOP+O+eUlFQHR BoBJ2O2LYJv4o3JOkEpRMVRTY35PCyDzCNyLRI5Tq2DfAHBSvV34u7LAIIxNXW1+yUmL TZDgxFCdZy1fMtoqeh5yb5tIMwJVyHQ3xbxWGZUTMW8RRn+tPyB2SAH4tGN+XxEdfyEG DMd0V/OCCNl/Jfohwegdp2FGt7bbWP3TBm/qPa5i5wu/nyIgcNbx8VEcliQ3xRTXHtSJ 2tpeNkJDknjJTekFoeY/dWT1RCDXvVfEf225aGEsdh4r2SiOo1RqLBK7cmBmvZbhWGvy +8xw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=vDNRlqwcYPGrDLvlvRgWTpqUbeYQQnBoZt9dHqWOSwQ=; b=gxc7aGMSgV34VF/fBfGNdp47qtcP5rtwhCR6NHvcWt7eV6/ITFx2wyciPc2I56DyDQ fc1l2OnjybODA+Fk8nsLOV4C/ScIzT34BBj+4wjbribUYur8vbW0Ptkqs/MVtwSkk7Mr Ix8ICK1JzhDZvSpYTLB4eIg93xWVKmDpTzTaNDMJePXJiV0VrMFP0h8MH6ydIZjwgIO9 Fe3PqMV6ESz3zS23nB8UcjNR6NvpMQr7fzEsai9NRHvOjA2ph2rfHDk+ZIiswEwGhgE4 NaS3fR5bdMmQfbFACiACFCO47phdxZsRoPwRV5kbx+WLDJL11rGJWD4WzkPGYKmJi9bZ 3IRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=mawsbFWk; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m8si2411357pgu.551.2018.02.15.04.51.25; Thu, 15 Feb 2018 04:51:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=mawsbFWk; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031479AbeBOMvY (ORCPT + 6 others); Thu, 15 Feb 2018 07:51:24 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:50171 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031225AbeBOMvX (ORCPT ); Thu, 15 Feb 2018 07:51:23 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1FCohRV016602; Thu, 15 Feb 2018 06:50:43 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518699043; bh=yiNuqhsw8qa81EkXTtFU7T0Uo9mwtXZXA6mMz8UldUM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mawsbFWkU8fgNGgR+X+GY9DebisakyuayXnaZvfnrjqz2eRRm1/ex6a8vWh3EeaRL cNWsWsi3ss5g5xkkLHwS+kHfDJ+ssAPZI2rT7k7WAZfvcJfgCCIlUwWCMY00P98Z9D 4UglVhCI5QIwxzk/axw0cc/r5ywkL4iB+giTX7b0= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1FCoh44012538; Thu, 15 Feb 2018 06:50:43 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Thu, 15 Feb 2018 06:50:43 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 15 Feb 2018 06:50:43 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1FCoKZH020487; Thu, 15 Feb 2018 06:50:38 -0600 From: Tero Kristo To: , , , , , CC: , , Subject: [PATCH 5/5] clk: ti: add support for clock latching to mux clocks Date: Thu, 15 Feb 2018 14:49:51 +0200 Message-ID: <1518698991-10099-6-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518698991-10099-1-git-send-email-t-kristo@ti.com> References: <1518698991-10099-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Latching the clock settings is needed with certain clocks, where the setting is "cached" in HW before doing the actual re-programming of the clock source. This patch adds support for clock latching to the mux clock. Signed-off-by: Tero Kristo --- drivers/clk/ti/clock.h | 1 + drivers/clk/ti/mux.c | 13 ++++++++++--- 2 files changed, 11 insertions(+), 3 deletions(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h index 62b108c..90b86aa 100644 --- a/drivers/clk/ti/clock.h +++ b/drivers/clk/ti/clock.h @@ -34,6 +34,7 @@ struct clk_omap_mux { u32 *table; u32 mask; u8 shift; + s8 latch; u8 flags; }; diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c index d470580..69a4308 100644 --- a/drivers/clk/ti/mux.c +++ b/drivers/clk/ti/mux.c @@ -86,6 +86,7 @@ static int ti_clk_mux_set_parent(struct clk_hw *hw, u8 index) } val |= index << mux->shift; ti_clk_ll_ops->clk_writel(val, &mux->reg); + ti_clk_latch(&mux->reg, mux->latch); return 0; } @@ -100,7 +101,7 @@ static struct clk *_register_mux(struct device *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, struct clk_omap_reg *reg, u8 shift, u32 mask, - u8 clk_mux_flags, u32 *table) + s8 latch, u8 clk_mux_flags, u32 *table) { struct clk_omap_mux *mux; struct clk *clk; @@ -121,6 +122,7 @@ static struct clk *_register_mux(struct device *dev, const char *name, memcpy(&mux->reg, reg, sizeof(*reg)); mux->shift = shift; mux->mask = mask; + mux->latch = latch; mux->flags = clk_mux_flags; mux->table = table; mux->hw.init = &init; @@ -160,7 +162,7 @@ struct clk *ti_clk_register_mux(struct ti_clk *setup) flags |= CLK_SET_RATE_PARENT; return _register_mux(NULL, setup->name, mux->parents, mux->num_parents, - flags, ®, mux->bit_shift, mask, + flags, ®, mux->bit_shift, mask, -EINVAL, mux_flags, NULL); } @@ -179,6 +181,7 @@ static void of_mux_clk_setup(struct device_node *node) u8 clk_mux_flags = 0; u32 mask = 0; u32 shift = 0; + s32 latch = -EINVAL; u32 flags = CLK_SET_RATE_NO_REPARENT; num_parents = of_clk_get_parent_count(node); @@ -197,6 +200,8 @@ static void of_mux_clk_setup(struct device_node *node) of_property_read_u32(node, "ti,bit-shift", &shift); + of_property_read_u32(node, "ti,latch-bit", &latch); + if (of_property_read_bool(node, "ti,index-starts-at-one")) clk_mux_flags |= CLK_MUX_INDEX_ONE; @@ -211,7 +216,8 @@ static void of_mux_clk_setup(struct device_node *node) mask = (1 << fls(mask)) - 1; clk = _register_mux(NULL, node->name, parent_names, num_parents, - flags, ®, shift, mask, clk_mux_flags, NULL); + flags, ®, shift, mask, latch, clk_mux_flags, + NULL); if (!IS_ERR(clk)) of_clk_add_provider(node, of_clk_src_simple_get, clk); @@ -234,6 +240,7 @@ struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup) return ERR_PTR(-ENOMEM); mux->shift = setup->bit_shift; + mux->latch = -EINVAL; mux->reg.index = setup->module; mux->reg.offset = setup->reg;