From patchwork Thu Feb 1 13:44:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 126535 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1723761ljc; Thu, 1 Feb 2018 05:45:50 -0800 (PST) X-Google-Smtp-Source: AH8x226NNdv0aNJlvows/vn9s948hE93fHPsIEV07JMB5M2wFknIaq2pjufJ8I/mZlXTzqoAg27W X-Received: by 10.98.198.2 with SMTP id m2mr37058639pfg.113.1517492750688; Thu, 01 Feb 2018 05:45:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517492750; cv=none; d=google.com; s=arc-20160816; b=Oi+Iw2ivvieCenJKh4uGdWqB/VXVCprXr9v4t5lkxx3MBiIeU7pUh/5a/7CFs/eVgk 95iHYCRaKrA2W982ZhGfq7emxEOkKMO72E0ny1H0/IuWTKMJyfjkGUlDMBebXQNlW4nm QlMS0xwUXlN57rNDpH7JvOmN60k4KQkhwNt0CYIb9+HZjUgjztz5x/E1FYoKTtFN1XS+ mtr9KZCPHqc9TVhjfGgpcB197c+T7NcUrUXdvOy3G0ZUQBw+7tlwwbwpHs+9kCwbSeih Ib6PwGykA11TcX3zuAIecQf7ojIp6DeOd9tNiJTuvLrQMvmrsBl3ukKl96LiaqN6PZBj 6DBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=PYfpBupgQhhMNHdYPWTW+99R7kw3VyH/fmH/kUtDhHs=; b=SGXEo/oBGWSVTx9sy4NiTGfABWkIFqR4RPeBPAC0Ms/NDwThQg76f8jd/T2aH1FoKH sGmN81f9CihQ9KWqsflv9wy6O1kPDcEa4Fst9k87aMi/FNqz5x9OrQvsVM4LPamcV3IB GrM7CyTmiUhaY2n5p1hKjrHvLgI2moXdhAaoc7Bx2elg0VCDr/P1PvqLAsnElDwhsbOo 48e+a9cHJEWwwr/ZaBpVUnnHvnr8qriDAHEe/2BDZ/vJotdClcqns12j7GOKY4Wp4Sex L4pQB+28YhJtBPkNkIzFpMsyh+QesOTv6G2VyL46auJxNf10fMf8COt8ZXrujvzABCzA Cf1g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q126si1709189pfc.334.2018.02.01.05.45.49; Thu, 01 Feb 2018 05:45:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752027AbeBANpq (ORCPT + 6 others); Thu, 1 Feb 2018 08:45:46 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:62987 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751508AbeBANpp (ORCPT ); Thu, 1 Feb 2018 08:45:45 -0500 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w11DhpkR020027; Thu, 1 Feb 2018 14:45:04 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2fubp005kd-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 01 Feb 2018 14:45:04 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EBE353A; Thu, 1 Feb 2018 13:45:02 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9DEEF2AFC; Thu, 1 Feb 2018 13:45:02 +0000 (GMT) Received: from localhost (10.75.127.48) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 1 Feb 2018 14:45:02 +0100 From: Fabrice Gasnier To: , , CC: , , , , , , , Subject: [PATCH 1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells Date: Thu, 1 Feb 2018 14:44:36 +0100 Message-ID: <1517492678-767-2-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1517492678-767-1-git-send-email-fabrice.gasnier@st.com> References: <1517492678-767-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG6NODE3.st.com (10.75.127.18) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-01_04:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gerald Baeza STM32 Low-Power Timer supports generic 3 cells pwm to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza Signed-off-by: Fabrice Gasnier --- Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt | 3 +++ 1 file changed, 3 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt index f8338d1..bd23302 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt @@ -7,6 +7,8 @@ See ../mfd/stm32-lptimer.txt for details about the parent node. Required parameters: - compatible: Must be "st,stm32-pwm-lp". +- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells + bindings defined in pwm.txt. Optional properties: - pinctrl-names: Set to "default". @@ -18,6 +20,7 @@ Example: ... pwm { compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&lppwm1_pins>; };