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[209.132.180.67]) by mx.google.com with ESMTP id p2si3628016pgu.812.2017.12.22.08.25.08; Fri, 22 Dec 2017 08:25:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=X1bTIHnb; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752458AbdLVQZH (ORCPT + 6 others); Fri, 22 Dec 2017 11:25:07 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:54406 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751966AbdLVQZG (ORCPT ); Fri, 22 Dec 2017 11:25:06 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBMGO6dt007769; Fri, 22 Dec 2017 10:24:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513959846; bh=GPQBCFQa6eLzutH4zaI2geu8qTghOjFc5p6nVLNyg6Q=; h=From:To:CC:Subject:Date; b=X1bTIHnbVmG5BqtGXTSlmQQLqeRdHGGONwQ6YDBXrytAlRTTtk/zV5FOEBrbeCrMM JkgxDf/KWSfSVbnxk4IrPLhaSaYAEy4k3OLotNBD55MEkoxOEiI/ltswxvuCVX6l8D VmgGE5SUSoRPxFugXU2mB4QEwuFpr/RxCFvDPn2c= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBMGO1Ym014287; Fri, 22 Dec 2017 10:24:01 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 22 Dec 2017 10:24:01 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 22 Dec 2017 10:24:01 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBMGNx9t019388; Fri, 22 Dec 2017 10:23:59 -0600 From: Tero Kristo To: CC: , , Tony Lindgren , Rob Herring Subject: [PATCHv3 RESEND 1/3] Documentation: dt: memory: ti-emif: add edac support under emif Date: Fri, 22 Dec 2017 18:23:54 +0200 Message-ID: <1513959834-27901-1-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Certain revisions of the TI EMIF IP contain ECC support in them. Reflect this in the DT binding. Signed-off-by: Tero Kristo Cc: Tony Lindgren Cc: Rob Herring --- Just resending this patch, missed adding devicetree list on this previously and it got lost. .../devicetree/bindings/memory-controllers/ti/emif.txt | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt b/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt index 0db6047..f56a347 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt +++ b/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt @@ -3,12 +3,16 @@ EMIF - External Memory Interface - is an SDRAM controller used in TI SoCs. EMIF supports, based on the IP revision, one or more of DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance -of the EMIF IP and memory parts attached to it. +of the EMIF IP and memory parts attached to it. Certain revisions +of the EMIF IP controller also contain optional ECC support, which +corrects one bit errors and detects two bit errors. Required properties: - compatible : Should be of the form "ti,emif-" where is the IP revision of the specific EMIF instance. For am437x should be ti,emif-am4372. + For dra7xx should be ti,emif-dra7xx. + For k2x family, should be ti,emif-keystone. - phy-type : indicating the DDR phy type. Following are the allowed values @@ -42,6 +46,10 @@ Optional properties: - hw-caps-temp-alert : Have this property if the controller has capability for generating SDRAM temperature alerts +- interrupts : A list of interrupt specifiers for memory + controller interrupts, if available. Required for EMIF instances + that support ECC. + Example: emif1: emif@0x4c000000 { @@ -54,3 +62,9 @@ emif1: emif@0x4c000000 { hw-caps-ll-interface; hw-caps-temp-alert; }; + +emif1: emif@4c000000 { + compatible = "ti,emif-dra7"; + reg = <0x4c000000 0x200>; + interrupts = ; +};