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[209.132.180.67]) by mx.google.com with ESMTP id f18si2443174pge.329.2017.11.17.01.28.33; Fri, 17 Nov 2017 01:28:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965814AbdKQJ20 (ORCPT + 6 others); Fri, 17 Nov 2017 04:28:26 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:11003 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757452AbdKQJ2R (ORCPT ); Fri, 17 Nov 2017 04:28:17 -0500 Received: from 172.30.72.58 (EHLO DGGEMS411-HUB.china.huawei.com) ([172.30.72.58]) by dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DLD25367; Fri, 17 Nov 2017 17:28:08 +0800 (CST) Received: from vm167-7.huawei.com (10.177.167.7) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.361.1; Fri, 17 Nov 2017 17:27:33 +0800 From: Xu YiPing To: , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH v3 1/3] dt-bindings: clk: Hi3660: Document stub clock Date: Fri, 17 Nov 2017 17:27:30 +0800 Message-ID: <1510910852-2175-2-git-send-email-xuyiping@hisilicon.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1510910852-2175-1-git-send-email-xuyiping@hisilicon.com> References: <1510910852-2175-1-git-send-email-xuyiping@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.177.167.7] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.5A0EABA8.0114, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 6227f0693cf0d97bad3766b09806765f Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Leo Yan Document the DT binding for stub clock which is used for CPU, GPU and DDR frequency scaling. Acked-by: Rob Herring Signed-off-by: Leo Yan --- Documentation/devicetree/bindings/clock/hi3660-clock.txt | 6 ++++++ include/dt-bindings/clock/hi3660-clock.h | 7 +++++++ 2 files changed, 13 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/clock/hi3660-clock.txt b/Documentation/devicetree/bindings/clock/hi3660-clock.txt index 0035a7e..946da7c 100644 --- a/Documentation/devicetree/bindings/clock/hi3660-clock.txt +++ b/Documentation/devicetree/bindings/clock/hi3660-clock.txt @@ -13,12 +13,18 @@ Required Properties: - "hisilicon,hi3660-pmuctrl" - "hisilicon,hi3660-sctrl" - "hisilicon,hi3660-iomcu" + - "hisilicon,hi3660-stub-clk" - reg: physical base address of the controller and length of memory mapped region. - #clock-cells: should be 1. +Optional Properties: + +- mboxes: Phandle to the mailbox for sending message to MCU. + (See: ../mailbox/hisilicon,hi3660-mailbox.txt for more info) + Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. diff --git a/include/dt-bindings/clock/hi3660-clock.h b/include/dt-bindings/clock/hi3660-clock.h index adb768d..75d583e 100644 --- a/include/dt-bindings/clock/hi3660-clock.h +++ b/include/dt-bindings/clock/hi3660-clock.h @@ -208,4 +208,11 @@ #define HI3660_CLK_I2C6_IOMCU 3 #define HI3660_CLK_IOMCU_PERI0 4 +/* clk in stub clock */ +#define HI3660_CLK_STUB_CLUSTER0 0 +#define HI3660_CLK_STUB_CLUSTER1 1 +#define HI3660_CLK_STUB_GPU 2 +#define HI3660_CLK_STUB_DDR 3 +#define HI3660_CLK_STUB_NUM 4 + #endif /* __DTS_HI3660_CLOCK_H */