From patchwork Fri Nov 17 09:24:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu YiPing X-Patchwork-Id: 119136 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp289268qgn; Fri, 17 Nov 2017 01:29:43 -0800 (PST) X-Google-Smtp-Source: AGs4zMaLOT0ngEszSljYsO38meuNMGJM4gGDkcCf7zDg60MXRihk7gPPuZsC93AAFc9ijSsOavgd X-Received: by 10.159.214.140 with SMTP id n12mr4523271plp.4.1510910983500; Fri, 17 Nov 2017 01:29:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510910983; cv=none; d=google.com; s=arc-20160816; b=cI7JX1F9N86WVXU+v2XOS5E8B+gqCvcK67mSmNUWC9j8dj7WO162RH7pFoLzu4lgeJ ngMgthaWywEd3IJcZvM9SGIutJkvOb6JIYAhsHasRzoR0LmNffzygDwtFfFXCQ3p7cgA XXg4kNvs/jkyo3mP0sWtFNvpnIQN1qiA1n8VFhOk1Ige7VNnjEwdfJoNiib5GjyLsvFO n3cqYPQSqVaFQzjGUejvnN9RdUfjKs4Wv1egs8d4DpUN4e9Zgf2wrn1Kyq5bsBQdN8V+ HQY/11+S8YocSfaSSXc81uIrETtX6chOyZYLTu/PC3uqdgJNnVXvDS1yblFDSSLtkd3y p9zQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=hb1UPrfynDn+ItjARRC62T49yiTDHtxGCix4Si2dWKo=; b=yerrU8gG7h/kHKLujflbuLRjMh9hS+QmrmPn+S+o5X/P2zCc2oOhJGzfpBJP1+yeCy ezLiOffeB4yDgHapwYAHqByeFqnURN2ndgZ57tDFhhxk5/oxsAwyqXByviOgpAuhGCpu qdwi871GY9ujcjW8/no1UOfqBpNU0S1+XPoOzkaLjUybGvYYHgtm9ID+QImXnnRIYHKa QJCYJvYj0+K7Q+IbcET6QTnXm4ehiEsvMagjoVeoEL41luzP0IM8r+j/q/htQVAcmZb9 SVaqUm72bDEjIBA7fOZe21vcM9Dml8OEdXePHoyGxdZf1cAAoerH+syesbtxs+yKJ6uO YDcw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u70si2668562pfk.350.2017.11.17.01.29.43; Fri, 17 Nov 2017 01:29:43 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965856AbdKQJ3P (ORCPT + 6 others); Fri, 17 Nov 2017 04:29:15 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:10946 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965930AbdKQJ3J (ORCPT ); Fri, 17 Nov 2017 04:29:09 -0500 Received: from 172.30.72.58 (EHLO DGGEMS402-HUB.china.huawei.com) ([172.30.72.58]) by dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DLA22892; Fri, 17 Nov 2017 17:25:22 +0800 (CST) Received: from vm167-7.huawei.com (10.177.167.7) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.361.1; Fri, 17 Nov 2017 17:24:34 +0800 From: Xu YiPing To: , , , , , CC: , , , , , , , , Subject: [PATCH v3 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding Date: Fri, 17 Nov 2017 17:24:30 +0800 Message-ID: <1510910672-1409-2-git-send-email-xuyiping@hisilicon.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1510910672-1409-1-git-send-email-xuyiping@hisilicon.com> References: <1510910672-1409-1-git-send-email-xuyiping@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.177.167.7] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020205.5A0EAB02.0047, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: bb0894d03a288da47192700d16d6f5ab Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Leo Yan Introduce a binding for the Hi3660 mailbox controller, the mailbox is used within application processor (AP), communication processor (CP), HIFI and MCU, etc. Signed-off-by: Leo Yan --- .../bindings/mailbox/hisilicon,hi3660-mailbox.txt | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt b/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt new file mode 100644 index 0000000..3e5b453 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt @@ -0,0 +1,51 @@ +Hisilicon Hi3660 Mailbox Controller + +Hisilicon Hi3660 mailbox controller supports up to 32 channels. Messages +are passed between processors, including application & communication +processors, MCU, HIFI, etc. Each channel is unidirectional and accessed +by using MMIO registers; it supports maximum to 8 words message. + +Controller +---------- + +Required properties: +- compatible: : Shall be "hisilicon,hi3660-mbox" +- reg: : Offset and length of the device's register set +- #mbox-cells: : Must be 3 + <&phandle channel dst_irq ack_irq> + phandle : Label name of controller + channel : Channel number + dst_irq : Remote interrupt vector + ack_irq : Local interrupt vector + +- interrupts: : Contains the two IRQ lines for mailbox. + +Example: + +mailbox: mailbox@e896b000 { + compatible = "hisilicon,hi3660-mbox"; + reg = <0x0 0xe896b000 0x0 0x1000>; + interrupts = <0x0 0xc0 0x4>, + <0x0 0xc1 0x4>; + #mbox-cells = <3>; +}; + +Client +------ + +Required properties: +- compatible : See the client docs +- mboxes : Standard property to specify a Mailbox (See ./mailbox.txt) + Cells must match 'mbox-cells' (See Controller docs above) + +Optional properties +- mbox-names : Name given to channels seen in the 'mboxes' property. + +Example: + +stub_clock: stub_clock@e896b500 { + compatible = "hisilicon,hi3660-stub-clk"; + reg = <0x0 0xe896b500 0x0 0x0100>; + #clock-cells = <1>; + mboxes = <&mailbox 13 3 0>; +};