From patchwork Tue Nov 14 08:52:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 118858 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp2784594qgn; Tue, 14 Nov 2017 00:53:38 -0800 (PST) X-Google-Smtp-Source: AGs4zMZb7A1P1GrzTsXufBPNrs8JdIAHX2TsNRxzCbq2esT6QKU4McedHsZ4lbP+NOzVUE5JhOfU X-Received: by 10.99.185.71 with SMTP id v7mr11603667pgo.24.1510649618422; Tue, 14 Nov 2017 00:53:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510649618; cv=none; d=google.com; s=arc-20160816; b=SufqV/xwqxo/DWfi+b/myBmkBiCMOQ6pvmiXb4FzVqRvdNCqtd7sqYzoIolxPr9d/Y XBi+sM+JMKfqMrVZkyZnMS8Y4MQn61BDREWEDZORqyi6AdlFUKwMX10KJdNSmseRTiYY raDUVKSC+9k9w2ph33SiaaRB9Y2CHzYwWzpfUvOMwutr38wTM8buXAMugMb1Q2I1s2Ww zGp4wgorwpLmqoprP1TW0jVJJq6EDUGM9Tf15lLBUlTwIugdEvI7E//FOhauOs4kplXq 3vMc75iCNUyADFhx/7NUDYuk+tjFP0vm51Q1O1BqGOwAMWC8Kq3AXI/w+Z82OGJQSKIp JFrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=DlKG0vir4CCwRfxgIRn6DKbOyWl7zClzoJiF20br7I0=; b=X8AS2pHYCmByLOLsT87/hYnGmtMLF3xkDypXMyJoe6cfL/Nk0X5DJW7xfsfvhpgP8q ZJTyOV7mUsUUX507kngDACME1cATCKipT2ezT1fOlNRW4YqXBiGQg+Z4Er7bzSuoNbvL H8qaNe7qjjc9/uMmGJIemQr+to6t1PehvnST/3W3sjbcT1VfEhQS2LWVOvjKdy9o8NiF sjA4v1Llt0Gn+aXV8QGomdL57mApkIlZpxs2ttJOg4QN8yWCxbHPcRDFwk/QKDKeUy4Z Zy8Q5cqGXps+RTFEDdHIaLoDp/92errn7Lr6zi0AxRjWDZVjeUizVOGLB+EUDSyLeskb S6yQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=bXQiWB4l; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f18si1550915pfe.25.2017.11.14.00.53.38; Tue, 14 Nov 2017 00:53:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=bXQiWB4l; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753507AbdKNIxg (ORCPT + 6 others); Tue, 14 Nov 2017 03:53:36 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:53439 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753282AbdKNIx0 (ORCPT ); Tue, 14 Nov 2017 03:53:26 -0500 Received: by mail-wm0-f65.google.com with SMTP id g141so20185174wmg.2 for ; Tue, 14 Nov 2017 00:53:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tPiCSY1XxdVRL/3HyNOPyM+f2qsOGv+RrPybQEQ2638=; b=bXQiWB4lpxtiF6SJkVMGr5v1prOB8TvDZhKTC2wyCGRXhgfRzHybID1lpwruu95bsq 8rW+uPdIsQaOIOEPR0H0EHdAx01ukasZvDMNoRyqLHXd5yAzqZyXwCIkGvx1og4GitUC 1j/F17omcgkYc4+TWkYsvOuCeFc6RtO2NUJ9k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tPiCSY1XxdVRL/3HyNOPyM+f2qsOGv+RrPybQEQ2638=; b=V0MkHyBLHA6arelM8/qdp8E1oScy9m4bCq5xoa7u+XXTHhfHqEXdpD34TaYyDXWbMm oGewJrmUXkIjOCL5gN8W05a5B12GHcjEy8VwMYg7cIT/D9wd2dsWggjgsOZ36dhCXKcd lmQPDbiSD5QUXrqnlQF5FwPmRmah5B4gLkJXiZMRGqd2uBf1Rf0tcmMLilZGj8Im355F 0wAFt+HK5fCximfUZ8kqf1cwvJ5/9v+J+u5iJ9zaiKkpgfiq923Hb/zXhcQH+kCvYYMa nxbnXJj5zT7LEFtmzhMpwu+TqB8d7k/O21D/Zhu6KuE99zSqbLQOsgq58fcYj4kl0eE2 Gtrw== X-Gm-Message-State: AJaThX5P8aaLAzR28Iui3NSXRcwtX6y9xx4avONLBnmYq07oD/glVxKO vrXLpqK7ssa9wcz4WV9/SuZvtw== X-Received: by 10.28.71.67 with SMTP id u64mr7826616wma.48.1510649605107; Tue, 14 Nov 2017 00:53:25 -0800 (PST) Received: from lmecxl0911.lme.st.com ([80.215.205.30]) by smtp.gmail.com with ESMTPSA id g28sm22894551wra.31.2017.11.14.00.53.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Nov 2017 00:53:24 -0800 (PST) From: Benjamin Gaignard To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, daniel.lezcano@linaro.org, tglx@linutronix.de, ludovic.barre@st.com, julien.thierry@arm.com, sudeep.holla@arm.com, arnd@arndb.de Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Benjamin Gaignard Subject: [PATCH v8 3/6] clocksource: stm32: increase min delta value Date: Tue, 14 Nov 2017 09:52:40 +0100 Message-Id: <1510649563-22975-4-git-send-email-benjamin.gaignard@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510649563-22975-1-git-send-email-benjamin.gaignard@linaro.org> References: <1510649563-22975-1-git-send-email-benjamin.gaignard@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The CPU is a CortexM4 @ 200MHZ and the clocks driving the timers are at 90MHZ with a min delta at 1 you could have an interrupt each 0.01 ms which is really to much. By increase it to 0x60 it give more time (around 1 ms) to CPU to handle the interrupt. Signed-off-by: Benjamin Gaignard --- drivers/clocksource/timer-stm32.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clocksource/timer-stm32.c b/drivers/clocksource/timer-stm32.c index fc61fd1..ae41a19 100644 --- a/drivers/clocksource/timer-stm32.c +++ b/drivers/clocksource/timer-stm32.c @@ -36,6 +36,8 @@ #define TIM_EGR_UG BIT(0) +#define MIN_DELTA 0x60 + static int stm32_clock_event_shutdown(struct clock_event_device *evt) { struct timer_of *to = to_timer_of(evt); @@ -129,7 +131,7 @@ static int __init stm32_clockevent_init(struct device_node *node) writel_relaxed(0, timer_of_base(to) + TIM_SR); clockevents_config_and_register(&to->clkevt, - timer_of_period(to), 0x1, max_delta); + timer_of_period(to), MIN_DELTA, max_delta); pr_info("%pOF: STM32 clockevent driver initialized (%d bits)\n", node, bits);