From patchwork Wed Oct 18 04:24:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 116187 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp5637062qgn; Tue, 17 Oct 2017 21:26:23 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDLtEEbFX6dd1ZIupDAa4YFI9OLqhH4idg+0P71xjFYrLu37EdSbl7xB63BSpK1jOaeSiIH X-Received: by 10.99.160.25 with SMTP id r25mr12755142pge.254.1508300783313; Tue, 17 Oct 2017 21:26:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508300783; cv=none; d=google.com; s=arc-20160816; b=zVsHNzamOoETK/Ql7pqWCMF2HP7jE1O1dTazXKZbyUXm9bZXy/6PcYF/bcE6R8fJ3X d6AD97jsA6SIFmgZ3VIEvleaMbuseucJk2fnAoEfG6B3MiLElK2o9WI7GfIDeU28BD4X eTMzByhCLk+l+0ndeE2xLedRr5p8fuz3n+fR2UzkKIAGpf+XjLPnbGEmE6DYtLe7aX1z v0+fJ+lRiOOWfkWZGNnbs3Grhg8WjoxSTCDo32tYrWGMeY69jsesyBoSlDfWrrctIIBz n1+fJiTkCH0Psy3lWju8O3D1fQbg3MgzZLMrbW0KzJw50UvkNkfBj609P6mzmxwDBKLn hRhw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=WyWL85Nrihz5/Tu3ieHutJqJCLWsmKNGl/RXb3Ainkg=; b=Ws5plqBhBmr5r2lwt7hzz0KhMMyOtLq1tX0Q6BsXR8Brgn529WhQ+GVOlFl2efe/DP D1TKHhtf+/mYc3zQ30szoy9AHlzapqJyUdkFIy+obhLvtEyQ3WVsunFmRjnB5DypQhAH H9UIIazyfQrXoEcU4JtAjplLx5AReq+r/7ETr4U/jZV5QSCUEplx7OawRCJtYBNNASVM gwZ7gdiJwXszIvMaACyBRD6DnfBo4ZFA3ZZyL0M39friUYH1wpPkAUGo68zPadyghJ0Y JARAW/vSy14GgSy30flUzPoiai4IWed29iJxZn/fA9RpEPMPLl0gA6gw5SSa2v1hlQ8H kWQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=vj+eZ9D5; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c85si6811257pfb.271.2017.10.17.21.26.23; Tue, 17 Oct 2017 21:26:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=vj+eZ9D5; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933506AbdJRE0W (ORCPT + 6 others); Wed, 18 Oct 2017 00:26:22 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:31393 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932670AbdJRE0S (ORCPT ); Wed, 18 Oct 2017 00:26:18 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v9I4OgxL020843; Wed, 18 Oct 2017 13:24:43 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v9I4OgxL020843 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1508300684; bh=jatBv0YkchzXQl1jv+7ZKG6ECk7veUf6oF+J/ya+VjQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vj+eZ9D5k0+XBL2prYiumWsschGZqlh7IsJline2Mo1xSCCCwV5YddFmNQMr/v/Wf jxz4zfSKxP3BnjhGvG8ltHcwDCnOvpwqnZV104U/1z0AEvYE5WqkoQw6do0DHh7Ine cW2Mm96bw3xigCpKpi66Mjy9HTpF8ZjAKOF0kFrp3vuC6P3N9aK8fgY3N5NvU2NVH/ H9ZvyajBJt19WchpC2j/tEcNUrRDdCYdoOORg+adQYhuIP80pnXKmXSPgVGI/hvrNP Yg2mO4TBsRlp2v+hZdVgX/KvROf6MnzkfeJWPc91m3NF1/KYRinpsRr+an+Ab2wLsZ V7qlq0LZDVZmw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Cc: Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , Russell King Subject: [PATCH 1/6] ARM: dts: uniphier: add GPIO controller nodes Date: Wed, 18 Oct 2017 13:24:32 +0900 Message-Id: <1508300677-23190-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508300677-23190-1-git-send-email-yamada.masahiro@socionext.com> References: <1508300677-23190-1-git-send-email-yamada.masahiro@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The GPIO controller also acts as an interrupt controller and the interrupt lines are connected to the AIDET block. Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/uniphier-ld4.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/uniphier-pro4.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/uniphier-pro5.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/uniphier-pxs2.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/uniphier-sld8.dtsi | 18 ++++++++++++++++++ 5 files changed, 77 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi index 79183db..b0151c4 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -103,6 +103,20 @@ clocks = <&peri_clk 3>; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <136>; + socionext,interrupt-ranges = <0 48 13>, <14 62 2>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; status = "disabled"; diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index b3dbbd9b..2921729 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -111,6 +111,20 @@ clocks = <&peri_clk 3>; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index b026bcd..c5d9501 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -198,6 +198,20 @@ clocks = <&peri_clk 3>; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 90b020c..4d83001 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -173,6 +173,23 @@ clocks = <&peri_clk 3>; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>, + <&pinctrl 96 0 0>; + gpio-ranges-group-names = "gpio_range0", + "gpio_range1"; + ngpios = <232>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, + <21 217 3>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi index b083903..09e52c8 100644 --- a/arch/arm/boot/dts/uniphier-sld8.dtsi +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi @@ -103,6 +103,24 @@ clocks = <&peri_clk 3>; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>, + <&pinctrl 104 0 0>, + <&pinctrl 112 0 0>; + gpio-ranges-group-names = "gpio_range0", + "gpio_range1", + "gpio_range2"; + ngpios = <136>; + socionext,interrupt-ranges = <0 48 13>, <14 62 2>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; status = "disabled";