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[125.227.221.25]) by smtp.gmail.com with ESMTPSA id t15sm6385583pgn.18.2016.12.21.20.57.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 21 Dec 2016 20:57:47 -0800 (PST) From: Jun Nie To: robh+dt@kernel.org, mark.rutland@arm.com, shawn.guo@linaro.org, xie.baoyou@zte.com.cn, devicetree@vger.kernel.org Cc: ulf.hansson@linaro.org, jh80.chung@samsung.com, jason.liu@linaro.org, chen.chaokai@zte.com.cn, lai.binz@zte.com.cn, linux-mmc@vger.kernel.org, Jun Nie Subject: [PATCH v8 1/5] Documentation: synopsys-dw-mshc: add binding for fifo quirks Date: Thu, 22 Dec 2016 12:57:33 +0800 Message-Id: <1482382657-16681-2-git-send-email-jun.nie@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1482382657-16681-1-git-send-email-jun.nie@linaro.org> References: <1482382657-16681-1-git-send-email-jun.nie@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add fifo-addr property and fifo-watermark-quirk property to synopsys-dw-mshc bindings. It is intended to provide more dt interface to support SoCs specific configuration. Signed-off-by: Jun Nie --- Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt index 7fd17c3..bca30b6 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt @@ -75,6 +75,17 @@ Optional properties: * card-detect-delay: Delay in milli-seconds before detecting card after card insert event. The default value is 0. +* data-addr: Override fifo address with value provided by DT. The default FIFO reg + offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A) by + driver. If the controller does not follow this rule, please use this property + to set fifo address in device tree. + +* fifo-watermark-aligned: Data done irq is expected if data length is less than + watermark in PIO mode. But fifo watermark is requested to be aligned with data + length in some SoC so that TX/RX irq can be generated with data done irq. Add this + watermark quirk to mark this requirement and force fifo watermark setting + accordingly. + * vmmc-supply: The phandle to the regulator to use for vmmc. If this is specified we'll defer probe until we can find this regulator. @@ -102,6 +113,8 @@ board specific portions as listed below. interrupts = <0 75 0>; #address-cells = <1>; #size-cells = <0>; + data-addr = <0x200>; + fifo-watermark-aligned; resets = <&rst 20>; reset-names = "reset"; };