From patchwork Wed Nov 30 07:33:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baoyou Xie X-Patchwork-Id: 84962 Delivered-To: patch@linaro.org Received: by 10.182.112.6 with SMTP id im6csp146305obb; Tue, 29 Nov 2016 23:34:45 -0800 (PST) X-Received: by 10.98.103.201 with SMTP id t70mr31847282pfj.99.1480491285619; Tue, 29 Nov 2016 23:34:45 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 137si63180831pfa.58.2016.11.29.23.34.45; Tue, 29 Nov 2016 23:34:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756360AbcK3Hej (ORCPT + 7 others); Wed, 30 Nov 2016 02:34:39 -0500 Received: from mail-pf0-f173.google.com ([209.85.192.173]:35368 "EHLO mail-pf0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755300AbcK3Hec (ORCPT ); Wed, 30 Nov 2016 02:34:32 -0500 Received: by mail-pf0-f173.google.com with SMTP id i88so37453731pfk.2 for ; Tue, 29 Nov 2016 23:34:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=MW1bW6G9b+v4Cz7LKV49311uClsPXjVvRSSkNeMGDWk=; b=QYvroFs57hZhladdEZBZ2aQ1ciYUJUDWGwK9lZ72mHtcVdGjyXqU33RV6OMye6UgTd eEdJdaxC/EeLzJN5OB3L2LcHhffFHThWb5LW+n1gWil19ZVvI09jFdEOcWJ0MI/Wl8B9 DkjI5ci+oO4tI8tyEvDw3EOmNxrLcmDcyJ7SI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=MW1bW6G9b+v4Cz7LKV49311uClsPXjVvRSSkNeMGDWk=; b=inYPQAIBdcDROFoyyD16hI89NCAg60G48XgG9jyQ7mclmmc7RUYAskm+d9J5sNaofD vQqEyOks0dLIu5kIjF5miRxx1ZP61fUfzcJ8UwO/4VrsqbWCpylITfpnosqX912LoWBt 1ttcdeZySRV2+VBf38M3JRHt33iGj1rFvoSp+OyVFJOd4Ql+OSeEGGYj3l2A6At91brV lxlXLG4CnEZHhKza4mO1jD6cYBVXEnf5IyJdzxv2A5hAtJw7AndgT51NzFnHu4sCEXKP X4OhiaD4xmsVKPNFJeMz+qxNXq0jDunPXF9M5eY4Gsdtu2JkwKroVYmXlzu7rEWhRzzJ wzDw== X-Gm-Message-State: AKaTC01vz9g52DZE48sEtNpcazK34MFhxb92e4Y08GlJ1F6W0n0DO8dJRyGDGR2x9l7hNvtt X-Received: by 10.99.49.213 with SMTP id x204mr56635793pgx.92.1480491271519; Tue, 29 Nov 2016 23:34:31 -0800 (PST) Received: from localhost.localdomain ([104.237.91.182]) by smtp.gmail.com with ESMTPSA id 74sm82364462pge.2.2016.11.29.23.34.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 Nov 2016 23:34:30 -0800 (PST) From: Baoyou Xie To: robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, shawnguo@kernel.org, jun.nie@linaro.org Cc: baoyou.xie@linaro.org, xie.baoyou@zte.com.cn, chen.chaokai@zte.com.cn, wang.qiang01@zte.com.cn, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: add zx296718's topcrm node Date: Wed, 30 Nov 2016 15:33:57 +0800 Message-Id: <1480491237-5169-1-git-send-email-baoyou.xie@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable topcrm clock node for zx296718, which is used for CPU's frequency change. Furthermore, this patch adds the CPU clock phandle in CPU's node and uses operating-points-v2 to register operating points. So it can be used by cpufreq-dt driver. Signed-off-by: Baoyou Xie --- arch/arm64/boot/dts/zte/zx296718.dtsi | 48 +++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi index 6b239a3..f9eb37d 100644 --- a/arch/arm64/boot/dts/zte/zx296718.dtsi +++ b/arch/arm64/boot/dts/zte/zx296718.dtsi @@ -44,6 +44,7 @@ #include #include #include +#include / { compatible = "zte,zx296718"; @@ -81,6 +82,8 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + clocks = <&topcrm A53_GATE>; + operating-points-v2 = <&cluster0_opp>; }; cpu1: cpu@1 { @@ -88,6 +91,7 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; cpu2: cpu@2 { @@ -95,6 +99,7 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; cpu3: cpu@3 { @@ -102,6 +107,43 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; + }; + }; + + cluster0_opp: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp@1000000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <857000>; + clock-latency-ns = <500000>; + }; + opp@1100000000 { + opp-hz = /bits/ 64 <648000000>; + opp-microvolt = <857000>; + clock-latency-ns = <500000>; + }; + opp@1200000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <882000>; + clock-latency-ns = <500000>; + }; + opp@1300000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <892000>; + clock-latency-ns = <500000>; + }; + opp@1400000000 { + opp-hz = /bits/ 64 <1188000000>; + opp-microvolt = <1009000>; + clock-latency-ns = <500000>; + }; + opp@1500000000 { + opp-hz = /bits/ 64 <1312000000>; + opp-microvolt = <1052000>; + clock-latency-ns = <500000>; }; }; @@ -279,6 +321,12 @@ dma-requests = <32>; }; + topcrm: clock-controller@01461000 { + compatible = "zte,zx296718-topcrm"; + reg = <0x01461000 0x1000>; + #clock-cells = <1>; + }; + sysctrl: sysctrl@1463000 { compatible = "zte,zx296718-sysctrl", "syscon"; reg = <0x1463000 0x1000>;