From patchwork Tue Nov 22 09:44:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 83362 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp2005021qge; Tue, 22 Nov 2016 01:45:16 -0800 (PST) X-Received: by 10.98.211.67 with SMTP id q64mr24217791pfg.173.1479807916597; Tue, 22 Nov 2016 01:45:16 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n14si27613137pfb.155.2016.11.22.01.45.16; Tue, 22 Nov 2016 01:45:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755602AbcKVJpA (ORCPT + 7 others); Tue, 22 Nov 2016 04:45:00 -0500 Received: from mail-wm0-f41.google.com ([74.125.82.41]:33522 "EHLO mail-wm0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755382AbcKVJo6 (ORCPT ); Tue, 22 Nov 2016 04:44:58 -0500 Received: by mail-wm0-f41.google.com with SMTP id c184so3063221wmd.0 for ; Tue, 22 Nov 2016 01:44:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Bu0/q8ZMHlXp7YhxfgAAGT0uf7EpKpeD5kCs+MKb5Sg=; b=I83U3k1oifQAzeLvkWbsrne6oUIQQEzXxztWdtoUYfsHzXJUVj+3RZBHzqSfp0sccr PWnxjxatUfnjpmU+Qs3F9KpkZ1Rfv+BndI0rklConuOKsMkf1XclFcPAFqNsgrw276fI GvlNXOa7S3+HZMmcsYXdmMxLOw7iZJ4AMygew= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Bu0/q8ZMHlXp7YhxfgAAGT0uf7EpKpeD5kCs+MKb5Sg=; b=Zbsqh1AKsD6wcM0TaAaQDo10BVc62NZmAsQK2g2Pp/dcDFg5cwRh2V/mRw/F0bTqLa L++WB3Bn4puNer2dVtP8EwNTlj/76ArN3ZdkFk9e6gMganNfp82gOb0EeIop2+wotuMI KDSGh+w3iwEucih4NoEJA9I6kadRNMGO8PPF9Y3yWJ0ptOwWM4/iN4sOBuo1mljscoWj RHcxABl4WtfaUdznTcLXOSA2L/NjxcKfU/iqOYdUz77bd99IyJcHVTKW0j0ma9/y7wvz T/Xr2GzyE1vjHZJN8Yu/xYkFlKIxqQuqKrRJdWKntoGRTuUNVBcey4vIGJgyZqIVqKJA xX+A== X-Gm-Message-State: AKaTC00ob2nYZCPdtncMlYezYOgoQV+eY7DzoCwl6AwxopGu4UKiWcuxcnvQD+oIftrdNNhB X-Received: by 10.28.165.2 with SMTP id o2mr1609449wme.38.1479807896906; Tue, 22 Nov 2016 01:44:56 -0800 (PST) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:d4cd:7489:29a3:d5ed]) by smtp.gmail.com with ESMTPSA id ab10sm29789450wjc.45.2016.11.22.01.44.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Nov 2016 01:44:56 -0800 (PST) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Brian Norris , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Heiko Stuebner , Douglas Anderson , Caesar Wang , Shawn Lin , Xing Zheng , Jianqun Xu , Elaine Zhang , David Wu , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support) Subject: [PATCH 2/4] arm64: dts: rockchip: Arch counter doesn't tick in system suspend Date: Tue, 22 Nov 2016 10:44:22 +0100 Message-Id: <1479807866-6957-2-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479807866-6957-1-git-send-email-daniel.lezcano@linaro.org> References: <20161122094300.GA2017@mai> <1479807866-6957-1-git-send-email-daniel.lezcano@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Brian Norris The "arm,no-tick-in-suspend" property was introduced to note implementations where the system counter does not quite follow the ARM specification that it "must be implemented in an always-on power domain". Particularly, RK3399's counter stops ticking when we switch from the 24MHz clock to the 32KHz clock in low-power suspend, so let's mark it as such. Signed-off-by: Brian Norris Reviewed-by: Douglas Anderson Signed-off-by: Daniel Lezcano --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Heiko Stuebner diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index b65c193..d85b651 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -174,6 +174,7 @@ , , ; + arm,no-tick-in-suspend; }; xin24m: xin24m {