From patchwork Tue Nov 15 07:31:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiancheng Xue X-Patchwork-Id: 82269 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp1400099qge; Mon, 14 Nov 2016 23:50:10 -0800 (PST) X-Received: by 10.98.15.5 with SMTP id x5mr44091560pfi.140.1479196209992; Mon, 14 Nov 2016 23:50:09 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j130si25458712pgc.172.2016.11.14.23.50.09; Mon, 14 Nov 2016 23:50:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755295AbcKOHuI (ORCPT + 7 others); Tue, 15 Nov 2016 02:50:08 -0500 Received: from szxga02-in.huawei.com ([119.145.14.65]:4094 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752777AbcKOHuI (ORCPT ); Tue, 15 Nov 2016 02:50:08 -0500 Received: from 172.24.1.136 (EHLO SZXEML429-HUB.china.huawei.com) ([172.24.1.136]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DQR27542; Tue, 15 Nov 2016 15:50:01 +0800 (CST) Received: from wind-Tecal-RH2285.huawei.com (10.67.212.71) by SZXEML429-HUB.china.huawei.com (10.82.67.184) with Microsoft SMTP Server id 14.3.235.1; Tue, 15 Nov 2016 15:49:54 +0800 From: Jiancheng Xue To: , , CC: , , , , , , , , Ruqiang Ju Subject: [PATCH] [media] ir-hix5hd2: make hisilicon, power-syscon property deprecated Date: Tue, 15 Nov 2016 15:31:32 +0800 Message-ID: <1479195092-20090-1-git-send-email-xuejiancheng@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.67.212.71] X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Ruqiang Ju The clock of IR can be provided by the clock provider and controlled by common clock framework APIs. Signed-off-by: Ruqiang Ju Signed-off-by: Jiancheng Xue --- .../devicetree/bindings/media/hix5hd2-ir.txt | 6 +++--- drivers/media/rc/ir-hix5hd2.c | 25 ++++++++++++++-------- 2 files changed, 19 insertions(+), 12 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/media/hix5hd2-ir.txt b/Documentation/devicetree/bindings/media/hix5hd2-ir.txt index fb5e760..54e1bed 100644 --- a/Documentation/devicetree/bindings/media/hix5hd2-ir.txt +++ b/Documentation/devicetree/bindings/media/hix5hd2-ir.txt @@ -8,10 +8,11 @@ Required properties: the device. The interrupt specifier format depends on the interrupt controller parent. - clocks: clock phandle and specifier pair. - - hisilicon,power-syscon: phandle of syscon used to control power. Optional properties: - linux,rc-map-name : Remote control map name. + - hisilicon,power-syscon: DEPRECATED. Don't use this in new dts files. + Provide correct clocks instead. Example node: @@ -19,7 +20,6 @@ Example node: compatible = "hisilicon,hix5hd2-ir"; reg = <0xf8001000 0x1000>; interrupts = <0 47 4>; - clocks = <&clock HIX5HD2_FIXED_24M>; - hisilicon,power-syscon = <&sysctrl>; + clocks = <&clock HIX5HD2_IR_CLOCK>; linux,rc-map-name = "rc-tivo"; }; diff --git a/drivers/media/rc/ir-hix5hd2.c b/drivers/media/rc/ir-hix5hd2.c index d0549fb..d26907e 100644 --- a/drivers/media/rc/ir-hix5hd2.c +++ b/drivers/media/rc/ir-hix5hd2.c @@ -75,15 +75,22 @@ static void hix5hd2_ir_enable(struct hix5hd2_ir_priv *dev, bool on) { u32 val; - regmap_read(dev->regmap, IR_CLK, &val); - if (on) { - val &= ~IR_CLK_RESET; - val |= IR_CLK_ENABLE; + if (dev->regmap) { + regmap_read(dev->regmap, IR_CLK, &val); + if (on) { + val &= ~IR_CLK_RESET; + val |= IR_CLK_ENABLE; + } else { + val &= ~IR_CLK_ENABLE; + val |= IR_CLK_RESET; + } + regmap_write(dev->regmap, IR_CLK, val); } else { - val &= ~IR_CLK_ENABLE; - val |= IR_CLK_RESET; + if (on) + clk_prepare_enable(dev->clock); + else + clk_disable_unprepare(dev->clock); } - regmap_write(dev->regmap, IR_CLK, val); } static int hix5hd2_ir_config(struct hix5hd2_ir_priv *priv) @@ -207,8 +214,8 @@ static int hix5hd2_ir_probe(struct platform_device *pdev) priv->regmap = syscon_regmap_lookup_by_phandle(node, "hisilicon,power-syscon"); if (IS_ERR(priv->regmap)) { - dev_err(dev, "no power-reg\n"); - return -EINVAL; + dev_info(dev, "no power-reg\n"); + priv->regmap = NULL; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0);