From patchwork Fri Nov 4 13:06:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ding Tianhong X-Patchwork-Id: 80856 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp1142850qge; Fri, 4 Nov 2016 06:09:20 -0700 (PDT) X-Received: by 10.99.219.81 with SMTP id x17mr22117624pgi.138.1478264960060; Fri, 04 Nov 2016 06:09:20 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e13si16428089pgn.145.2016.11.04.06.09.19; Fri, 04 Nov 2016 06:09:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761107AbcKDNJR (ORCPT + 7 others); Fri, 4 Nov 2016 09:09:17 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:10760 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760907AbcKDNJP (ORCPT ); Fri, 4 Nov 2016 09:09:15 -0400 Received: from 172.24.1.137 (EHLO szxeml425-hub.china.huawei.com) ([172.24.1.137]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DQB85629; Fri, 04 Nov 2016 21:06:53 +0800 (CST) Received: from localhost (10.177.23.32) by szxeml425-hub.china.huawei.com (10.82.67.180) with Microsoft SMTP Server id 14.3.235.1; Fri, 4 Nov 2016 21:06:45 +0800 From: Ding Tianhong To: , , , , , , , , , , CC: Ding Tianhong Subject: [PATCH v3 5/6] arm64: arch_timer: apci: Introduce a generic aquirk framework for erratum Date: Fri, 4 Nov 2016 21:06:33 +0800 Message-ID: <1478264794-14652-5-git-send-email-dingtianhong@huawei.com> X-Mailer: git-send-email 1.8.5.2.msysgit.0 In-Reply-To: <1478264794-14652-1-git-send-email-dingtianhong@huawei.com> References: <1478264794-14652-1-git-send-email-dingtianhong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.32] X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Hanjun Guo Introduce a general quirk framework for each timer erratum in ACPI, which use the oem information in GTDT table for platform specific erratums. The struct gtdt_arch_timer_fixup is introduced to record the oem information to match the quirk and handle the erratum. v3: Introduce a generic aquick framework for erratum in ACPI mode. Signed-off-by: Hanjun Guo Signed-off-by: Ding Tianhong --- drivers/clocksource/arm_arch_timer.c | 37 ++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) -- 1.9.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 3d59af1..9bc93e5 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1068,6 +1068,40 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init); #ifdef CONFIG_ACPI +struct gtdt_arch_timer_fixup { + char oem_id[ACPI_OEM_ID_SIZE]; + char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; + u32 oem_revision; + + /* quirk handler for arch timer erratum */ + void (*handler)(u32 erratum); + u32 erratum; +}; + +/* note: this needs to be updated according to the doc of OEM ID + * and TABLE ID for different board. + */ +struct gtdt_arch_timer_fixup arch_timer_quirks[] __initdata = { +}; + +void __init arch_timer_acpi_quirks_handler(char *oem_id, + char *oem_table_id, + u32 oem_revision) +{ + struct gtdt_arch_timer_fixup *quirks = arch_timer_quirks; + int i; + + for (i = 0; i < ARRAY_SIZE(arch_timer_quirks); i++, quirks++) { + if (!memcmp(quirks->oem_id, oem_id, ACPI_OEM_ID_SIZE) && + !memcmp(quirks->oem_table_id, oem_table_id, ACPI_OEM_TABLE_ID_SIZE) && + quirks->oem_revision == oem_revision) { + if (quirks->handler && quirks->erratum) + quirks->handler(quirks->erratum); + break; + } + } +} + static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) { int trigger, polarity; @@ -1094,6 +1128,9 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) return -EINVAL; } + arch_timer_acpi_quirks_handler(table->oem_id, table->oem_table_id, + table->oem_revision); + gtdt = container_of(table, struct acpi_table_gtdt, header); arch_timers_present |= ARCH_CP15_TIMER;