From patchwork Thu Apr 21 06:01:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 66289 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp2852813qge; Wed, 20 Apr 2016 23:01:21 -0700 (PDT) X-Received: by 10.98.70.67 with SMTP id t64mr18045680pfa.110.1461218481009; Wed, 20 Apr 2016 23:01:21 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a75si1638464pfc.20.2016.04.20.23.01.20; Wed, 20 Apr 2016 23:01:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751172AbcDUGBT (ORCPT + 7 others); Thu, 21 Apr 2016 02:01:19 -0400 Received: from conuserg-11.nifty.com ([210.131.2.78]:26397 "EHLO conuserg-11.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751150AbcDUGBT (ORCPT ); Thu, 21 Apr 2016 02:01:19 -0400 Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-11.nifty.com with ESMTP id u3L60ETl025515; Thu, 21 Apr 2016 15:00:14 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com u3L60ETl025515 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1461218415; bh=8ErBMrJk1ipIPu1EosRSo9H1jzecAVqMQOMW7Afo0Yc=; h=From:To:Cc:Subject:Date:From; b=pEBugSgAZKMc7Bt2HoNl7yWxPjffbe2bgMZWg0s+EZqStp21O0aimYkiy3LXSvewM jKgbGYUbj5OOuiVZaoHwHVocRNbpa4FMEjDhBVr/ah6roCg/K8w0W5itjrHCjemQXP StBtbsgMvc0/V8vlwX3jDkkhG07Yxyca3c4Sc8vkmjIkNTJP2LfjH0zGaALs1Y2U2s +kSwOHSPcAEhGvMZLcdQId+LK/Ju9lq1/+kFUDMopfP9J2EuK/JyTZJmxeL8Lt1zDC Hp0lIaefmhv8RK5KQ7A0TQKuuCZJc8634p3s+/QacA2yV7oHKjdZxDiJHm1NJFd4he m6UZvV5hk2t6A== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: arm@kernel.org Cc: Masahiro Yamada , devicetree@vger.kernel.org, Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , Rob Herring , Pawel Moll , Will Deacon , Mark Rutland , Catalin Marinas , linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: dts: uniphier: add reference clock node for PH1-LD20 Date: Thu, 21 Apr 2016 15:01:09 +0900 Message-Id: <1461218469-19250-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a master clock node generated by a 25MHz crystal oscillator. Signed-off-by: Masahiro Yamada --- arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi index 651c9d9..9532880 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi @@ -106,6 +106,12 @@ }; clocks { + refclk: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + uart_clk: uart_clk { #clock-cells = <0>; compatible = "fixed-clock";