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[209.132.180.67]) by mx.google.com with ESMTP id i77si1181491pfj.182.2016.01.30.00.56.14; Sat, 30 Jan 2016 00:56:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753018AbcA3I4N (ORCPT + 6 others); Sat, 30 Jan 2016 03:56:13 -0500 Received: from mail-vk0-f49.google.com ([209.85.213.49]:36064 "EHLO mail-vk0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752908AbcA3I4M (ORCPT ); Sat, 30 Jan 2016 03:56:12 -0500 Received: by mail-vk0-f49.google.com with SMTP id n1so54175524vkb.3 for ; Sat, 30 Jan 2016 00:56:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EpAIdvO6SB6riW4w34ot/iflo2UCEyNr9h96UZqU8aM=; b=DrPhgvjU5Emi+WRmygDOq5FPG1eKV5NyjCV068Lo1B/lGNklTYYu9qJAF91Ux2HSBx yCr8IBHy9AVbkdgwtLDdA2OkeNMO3MSdsghdBgEldH8uKRhU9fpUqYMPq5aoL0AOnW17 ZRhsfEOROlcxBOP5sZTYBLpKAZsLClcVsPGiE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EpAIdvO6SB6riW4w34ot/iflo2UCEyNr9h96UZqU8aM=; b=VNL7eKJxNOVRvS4E39+dI5RIBF7Vry/9p4twy0mQLbqiuAxZT0IY4I+IQ3FajRLM1v jRD54+BzOS6Jm7Ol8VMCQSO88xyqol4nRBM8bYdKrZUfXMI+uz27/rr9eSlCIfxWS+Gk zK2oOWeHvuJDPbeUrgM3EX1m9Rwt7D2V8/3J9B0OVA/BfPws27hfOEAFMtC3BOop9P7q Ocm/dr3qiNL1goGl/1eItIEsL+Gk+AUxtfBaWcd1yPWBQlsfZbEL/I/aXJRmnxDhzUOI J58oHuWE/oljNPvUR2EweAtTpVVLU93cN+zd/y8eiFHOqYnUqT9MpBRFjUGRxa+/NU1P U9pw== X-Gm-Message-State: AG10YOR0ck+fRWkRAmp/XSkG8JsGdlZ6DILocx8Lh7WJc7kGx86oL0cdrDFvgUbPEXYwm3is X-Received: by 10.31.7.140 with SMTP id 134mr9126908vkh.155.1454144171585; Sat, 30 Jan 2016 00:56:11 -0800 (PST) Received: from localhost.localdomain ([113.97.185.10]) by smtp.gmail.com with ESMTPSA id 79sm2742487vkj.21.2016.01.30.00.55.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 30 Jan 2016 00:56:11 -0800 (PST) From: Xinliang Liu To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, daniel@ffwll.ch, robh@kernel.org, daniel@fooishbar.org, architt@codeaurora.org, airlied@linux.ie, corbet@lwn.net, catalin.marinas@arm.com, will.deacon@arm.com, emil.l.velikov@gmail.com Cc: linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxarm@huawei.com, andy.green@linaro.org, haojian.zhuang@linaro.org, liguozhu@hisilicon.com, xuwei5@hisilicon.com, w.f@huawei.com, puck.chen@hisilicon.com, bintian.wang@huawei.com, benjamin.gaignard@linaro.org, xuyiping@hisilicon.com, kong.kongxinwei@hisilicon.com, zourongrong@huawei.com, lijianhua@huawei.com, sumit.semwal@linaro.org, guodong.xu@linaro.org, Xinliang Liu Subject: [PATCH v3 01/10] drm/hisilicon: Add device tree binding for hi6220 display subsystem Date: Sat, 30 Jan 2016 16:54:26 +0800 Message-Id: <1454144075-74361-2-git-send-email-xinliang.liu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454144075-74361-1-git-send-email-xinliang.liu@linaro.org> References: <1454144075-74361-1-git-send-email-xinliang.liu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add ADE display controller binding doc. Add DesignWare DSI Host Controller v1.20a binding doc. Signed-off-by: Xinliang Liu v3: - Make ade as the drm master node. - Use assigned-clocks to set clock rate. - Use ports to connect display relavant nodes. v2: - Move dt binding docs to bindings/display/hisilicon directory. --- .../bindings/display/hisilicon/dw-dsi.txt | 60 ++++++++++++++++++++++ .../bindings/display/hisilicon/hisi-ade.txt | 56 ++++++++++++++++++++ 2 files changed, 116 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt create mode 100644 Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt new file mode 100644 index 000000000000..44b945a54f3f --- /dev/null +++ b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt @@ -0,0 +1,60 @@ +Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver + +A DSI Host Controller resides in the middle of display controller and external +HDMI converter. + +Required properties: +- compatible: value should be "hisilicon,hi6220-dsi". +- reg: physical base address and length of the controller's registers. +- clocks: the clocks needed. +- clock-names: the name of the clocks. +- ports: contains DSI controller input and output sub port. The input port + connects to ADE output port, and output port connected to external HDMI + endpoint. See Documentation/devicetree/bindings/graph.txt for more device + graph info. + +A example of HiKey board hi6220 SoC and board specific DT entry: +Example: + +SoC specific: + dsi: dsi@0xf4107800 { + compatible = "hisilicon,hi6220-dsi"; + reg = <0x0 0xf4107800 0x0 0x100>; + clocks = <&media_ctrl HI6220_DSI_PCLK>; + clock-names = "pclk_dsi"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi_in: endpoint { + remote-endpoint = <&ade_out>; + }; + }; + + port@1 { + reg = <1>; /* 1 for output port */ + dsi_out: endpoint { + remote-endpoint = <&adv7533_in>; + }; + }; + }; + }; + +Board specific: + i2c2: i2c@f7102000 { + ... + + adv7533: adv7533@39 { + ... + + port { + adv7533_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt new file mode 100644 index 000000000000..47925826536c --- /dev/null +++ b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt @@ -0,0 +1,56 @@ +Device-Tree bindings for hisilicon ADE display controller driver + +ADE (Advanced Display Engine) is the display controller which grab image +data from memory, do composition, do post image processing, generate RGB +timing stream and transfer to DSI. + +Required properties: +- compatible: value should be "hisilicon,hi6220-ade". +- reg: physical base address and length of the controller's registers. +- reg-names: name of physical base. +- interrupt: the interrupt number. +- clocks: the clocks needed. +- clock-names: the name of the clocks. +- assigned-clocks: clocks to be assigned rate. +- assigned-clock-rates: clock rates which are assigned to assigned-clocks. +- port: the output port. This contains one endpoint subnode, with its + remote-endpoint set to the phandle of the connected DSI endpoint. + See Documentation/devicetree/bindings/graph.txt for more device graph info. + +Optional properties: +- dma-coherent: Present if dma operations are coherent. + + +A example of HiKey board hi6220 SoC specific DT entry: +Example: + + ade: ade@f4100000 { + compatible = "hisilicon,hi6220-ade"; + reg = <0x0 0xf4100000 0x0 0x7800>, + <0x0 0xf4410000 0x0 0x1000>, + <0x0 0xf4520000 0x0 0x1000>; + reg-names = "ade_base", + "media_base", + "media_noc_base"; + + interrupts = <0 115 4>; /* ldi interrupt */ + + clocks = <&media_ctrl HI6220_ADE_CORE>, + <&media_ctrl HI6220_CODEC_JPEG>, + <&media_ctrl HI6220_ADE_PIX_SRC>; + /*clock name*/ + clock-names = "clk_ade_core", + "clk_codec_jpeg", + "clk_ade_pix"; + + assigned-clocks = <&media_ctrl HI6220_ADE_CORE>, + <&media_ctrl HI6220_CODEC_JPEG>; + assigned-clock-rates = <360000000>, <288000000>; + dma-coherent; + + port { + ade_out: endpoint { + remote-endpoint = <&dsi_in>; + }; + }; + };