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[209.132.180.67]) by mx.google.com with ESMTP id a90si8222641pfj.20.2016.01.22.00.41.06; Fri, 22 Jan 2016 00:41:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751893AbcAVIlC (ORCPT + 6 others); Fri, 22 Jan 2016 03:41:02 -0500 Received: from mail-pa0-f47.google.com ([209.85.220.47]:35285 "EHLO mail-pa0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751818AbcAVIk6 (ORCPT ); Fri, 22 Jan 2016 03:40:58 -0500 Received: by mail-pa0-f47.google.com with SMTP id ho8so38038859pac.2 for ; Fri, 22 Jan 2016 00:40:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3YUS2iqJESu4xyB0OQB+Ted9BRGzel1F1qqpxJPJPjI=; b=I07s2BrrAg3uMLVrR+7H/I6yFFCw8a6uALEoIt5PO0Z1LNwm3+E8ALVGqwVZQDNj8b We5dDRAIydn7nceTgZSYxi/s8ZiP2TgcK7vw2lORIxE09vXMQukpaqYLlBXchYTjmsRI RBmGR22CrD7jIjhjYGsPYpWfYBzR0R4D9UQLE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3YUS2iqJESu4xyB0OQB+Ted9BRGzel1F1qqpxJPJPjI=; b=lxer+O6IKZVwy+Lj5jK3vZkOZvs5aTo+SvkaVSocBwi0iX3CQ9okbkq25uylr2jrlG dP3N0JkdObTzJHkimbN0zKeiWKa9A4nYFMIEl+4q5Mcw/793lM/u05LIueZ27d1BKYkH S8k6JptQJ6xbrv+xlTAM5mG7FgP2F8MKGrY2vFRmQDKyUDXeAZpxcp1BS5iuzxVc96RC 0/SuQxyT/7yDmntT0RmxRRPkUy9pWgUpyl6gskE0Rf5zN4rfYPM8Qtov9y9PkUbJG8Lm X3P0x5dc6ugJMasnFaxW85SKHddbJp7TXWTx/p0036Q1LANh69rJ1eww4buLGjQAuvtM hK7g== X-Gm-Message-State: AG10YOT2YeuEJaj9bwzGAOCdfeveFRscNxeF2SCNa9TtR0OFhhNbbKvPeCke420HDzqg24wm X-Received: by 10.66.150.37 with SMTP id uf5mr2737726pab.30.1453452058182; Fri, 22 Jan 2016 00:40:58 -0800 (PST) Received: from localhost.localdomain ([124.219.30.17]) by smtp.googlemail.com with ESMTPSA id ty5sm7761114pac.48.2016.01.22.00.40.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 22 Jan 2016 00:40:57 -0800 (PST) From: Pi-Cheng Chen To: Nishanth Menon , Eduardo Valentin , Viresh Kumar , Rob Herring , Sascha Hauer Cc: Kevin Hilman , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [RFC PATCH 3/5] dt-bindings: thermal: Add optional properties of Mediatek thermal controller Date: Fri, 22 Jan 2016 16:40:27 +0800 Message-Id: <1453452029-20843-4-git-send-email-pi-cheng.chen@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453452029-20843-1-git-send-email-pi-cheng.chen@linaro.org> References: <1453452029-20843-1-git-send-email-pi-cheng.chen@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds optional properties of Mediatek thermal controller which are required by SVS engine integrated with Mediatek thermal controller. Signed-off-by: Pi-Cheng Chen --- .../bindings/thermal/mediatek-thermal.txt | 23 ++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt index 81f9a51..acaacaa 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt @@ -7,6 +7,11 @@ this device needs phandles to the AUXADC. Also it controls a mux in the apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS is also needed. +There is another hardware engine, SVS (Smart Voltage Scaling) which shares the +same block of banked registers with Mediatek thermal controller. Hence the +driver of SVS is integrated with the driver of Mediatek thermal controller. The +properties required by SVS engine are optional for Mediatek thermal controller. + Required properties: - compatible: "mediatek,mt8173-thermal" - reg: Address range of the thermal controller @@ -21,9 +26,15 @@ Required properties: - #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description. Optional properties: -- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If - unspecified default values shall be used. -- nvmem-cell-names: Should be "calibration-data" +- clocks, clock-names: Clocks that are optional for the thermal controller. + Specify to enable SVS engine. + "svs_pll": The PLL clock should be switched to during + initialization stage of SVS engine. + "svs_mux": The MUX clock controls the clock input of SVS engine. +- nvmem-cells: A list of phandles to the calibration data provided by a nvmem + device. If unspecified default values shall be used. The SVS + engine will be disabled if no SVS calibration data is specified. +- nvmem-cell-names: Should be "calibration-data" and "svs-calibration-data" Example: @@ -33,11 +44,11 @@ Example: reg = <0 0x1100b000 0 0x1000>; interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; - clock-names = "therm", "auxadc"; + clock-names = "therm", "auxadc", ; resets = <&pericfg MT8173_PERI_THERM_SW_RST>; reset-names = "therm"; mediatek,auxadc = <&auxadc>; mediatek,apmixedsys = <&apmixedsys>; - nvmem-cells = <&thermal_calibration_data>; - nvmem-cell-names = "calibration-data"; + nvmem-cells = <&thermal_calibration_data>, <&svs-calibration>; + nvmem-cell-names = "calibration-data", "svs-calibration-data"; };