From patchwork Thu Nov 5 13:34:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Feng X-Patchwork-Id: 56050 Delivered-To: patch@linaro.org Received: by 10.112.61.134 with SMTP id p6csp416982lbr; Thu, 5 Nov 2015 05:51:54 -0800 (PST) X-Received: by 10.50.110.102 with SMTP id hz6mr3322461igb.47.1446731514253; Thu, 05 Nov 2015 05:51:54 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id fs4si23676696igb.79.2015.11.05.05.51.54; Thu, 05 Nov 2015 05:51:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032811AbbKENvw (ORCPT + 6 others); Thu, 5 Nov 2015 08:51:52 -0500 Received: from szxga02-in.huawei.com ([119.145.14.65]:33150 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030850AbbKENvw (ORCPT ); Thu, 5 Nov 2015 08:51:52 -0500 Received: from 172.24.1.47 (EHLO szxeml426-hub.china.huawei.com) ([172.24.1.47]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CVT68608; Thu, 05 Nov 2015 21:35:03 +0800 (CST) Received: from vm163-62.huawei.com (10.184.163.62) by szxeml426-hub.china.huawei.com (10.82.67.181) with Microsoft SMTP Server id 14.3.235.1; Thu, 5 Nov 2015 21:34:53 +0800 From: Chen Feng To: , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH 2/7] doc:bindings:Document for mtcmos regulator on hi6220 SoC Date: Thu, 5 Nov 2015 21:34:43 +0800 Message-ID: <1446730488-31930-3-git-send-email-puck.chen@hisilicon.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1446730488-31930-1-git-send-email-puck.chen@hisilicon.com> References: <1446730488-31930-1-git-send-email-puck.chen@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.184.163.62] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020204.563B5B0B.0150,ss=1,re=0.000,fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2011-05-27 18:58:46 X-Mirapoint-Loop-Id: 5583cc45c18444fa1bd2f8c377af6269 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Document for mtcmos driver on hi6220 SoC Signed-off-by: Chen Feng Signed-off-by: Fei Wang --- .../bindings/regulator/hisilicon,hi6220-mtcmos.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/hisilicon,hi6220-mtcmos.txt -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/regulator/hisilicon,hi6220-mtcmos.txt b/Documentation/devicetree/bindings/regulator/hisilicon,hi6220-mtcmos.txt new file mode 100644 index 0000000..bb06e1b --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/hisilicon,hi6220-mtcmos.txt @@ -0,0 +1,32 @@ +Hi6220 mtcmos Voltage regulators + +Required parent device properties: +- compatible: Must be "hisilicon,hi6220-mtcmos-driver" +- hisilicon,mtcmos-steady-us: The time to wait for power steady +- hisilicon,mtcmos-sc-on-base: address of mtcmos on hi6220 SoC + +Required child device properties: +- regulator-name: The name of mtcmos +- hisilicon,ctrl-regs: Offset of ctrl-regs +- hisilicon,ctrl-data: The bit to ctrl the regulator + +Example: + mtcmos { + compatible = "hisilicon,hi6220-mtcmos-driver"; + hisilicon,mtcmos-steady-us = <10>; + hisilicon,mtcmos-sc-on-base = <0xf7800000>; + hisilicon,mtcmos-acpu-on-base = <0xf65a0000>; + + mtcmos1: regulator@a1{ + regulator-name = "G3D_PD_VDD"; + regulator-compatible = "mtcmos1"; + hisilicon,ctrl-regs = <0x830 0x834 0x83c>; + hisilicon,ctrl-data = <1 0x1>; + }; + mtcmos2: regulator@a2{ + regulator-name = "SOC_MED"; + regulator-compatible = "mtcmos2"; + hisilicon,ctrl-regs = <0x830 0x834 0x83c>; + hisilicon,ctrl-data = <2 0x1>; + }; + };