From patchwork Wed Sep 16 07:42:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriel Fernandez X-Patchwork-Id: 53715 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f198.google.com (mail-wi0-f198.google.com [209.85.212.198]) by patches.linaro.org (Postfix) with ESMTPS id E6C2922A0D for ; Wed, 16 Sep 2015 07:44:07 +0000 (UTC) Received: by wicgb1 with SMTP id gb1sf17794800wic.3 for ; Wed, 16 Sep 2015 00:44:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=tbW2dQ8xhbgymMwqXTpMEIcNlw4UeWTVaC+DbF/u1Uw=; b=QkYoXaZyZwAJynjS7Q4pkoIVujAUOmxw97dtRqgwX1Q9DO+VHNSSGX0qDFPC1BR0yn ply4JP0hVzGMkF3PRYjE/dXLDC11zHSHMjFzJQvh4amry8IBbzkuoJZZhAWyLaMFnsMt r+9COQNM/scdJQyAAL1a0mvi5ItQgY9bvUr+7Q4wL2+wEsZUBj+/QellWSD+FyhlT/m6 If98tQTFPQVM1mKaIrR6FiCfX/HSuwFlpwW8dJIP9UdWZu/1ofo2B0baHBoYDhU/X8tS 7Mx0w/Zn1Wtk5LV1ckiphS74+iollSTrXHAfrni76sMnSjFRl0DgbbSXKZcDslMBRlfk sERg== X-Gm-Message-State: ALoCoQnnzEMpcvcDFVrYYWPSLUyr0IXKVb8HUD3sFBwaFfxOelfvQLeRQOEpyZ0xgpzTfvI0VB+8 X-Received: by 10.180.96.226 with SMTP id dv2mr1654485wib.2.1442389447244; Wed, 16 Sep 2015 00:44:07 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.20.229 with SMTP id q5ls77449lae.17.gmail; Wed, 16 Sep 2015 00:44:07 -0700 (PDT) X-Received: by 10.152.6.133 with SMTP id b5mr27377854laa.33.1442389447048; Wed, 16 Sep 2015 00:44:07 -0700 (PDT) Received: from mail-la0-f52.google.com (mail-la0-f52.google.com. [209.85.215.52]) by mx.google.com with ESMTPS id am8si17321896lac.144.2015.09.16.00.44.07 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Sep 2015 00:44:07 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) client-ip=209.85.215.52; Received: by lahg1 with SMTP id g1so94010459lah.1 for ; Wed, 16 Sep 2015 00:44:07 -0700 (PDT) X-Received: by 10.112.151.106 with SMTP id up10mr27492295lbb.106.1442389446897; Wed, 16 Sep 2015 00:44:06 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp2265843lbq; Wed, 16 Sep 2015 00:44:05 -0700 (PDT) X-Received: by 10.66.218.135 with SMTP id pg7mr57073962pac.141.1442389445719; Wed, 16 Sep 2015 00:44:05 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bx2si38667523pab.140.2015.09.16.00.44.04; Wed, 16 Sep 2015 00:44:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752640AbbIPHns (ORCPT + 29 others); Wed, 16 Sep 2015 03:43:48 -0400 Received: from mail-wi0-f171.google.com ([209.85.212.171]:35142 "EHLO mail-wi0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752524AbbIPHno (ORCPT ); Wed, 16 Sep 2015 03:43:44 -0400 Received: by wicge5 with SMTP id ge5so61240946wic.0 for ; Wed, 16 Sep 2015 00:43:43 -0700 (PDT) X-Received: by 10.180.90.198 with SMTP id by6mr16763927wib.82.1442389423438; Wed, 16 Sep 2015 00:43:43 -0700 (PDT) Received: from lmenx315.st.com. ([80.12.39.68]) by smtp.gmail.com with ESMTPSA id d1sm3017796wiz.0.2015.09.16.00.43.41 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Sep 2015 00:43:42 -0700 (PDT) From: Gabriel Fernandez To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Srinivas Kandagatla , Maxime Coquelin , Patrice Chotard , Russell King , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Peter Griffin , Pankaj Dev , Olivier Bideau , Geert Uytterhoeven , Fabian Frederick Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@stlinux.com, linux-clk@vger.kernel.org Subject: [PATCH 2/2] drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x Date: Wed, 16 Sep 2015 09:42:59 +0200 Message-Id: <1442389379-9298-3-git-send-email-gabriel.fernandez@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1442389379-9298-1-git-send-email-gabriel.fernandez@linaro.org> References: <1442389379-9298-1-git-send-email-gabriel.fernandez@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: gabriel.fernandez@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Use a generic name for this kind of PLL Correction in dts files are already done here: commit 5eb26c605909 ("ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x") Signed-off-by: Gabriel Fernandez --- drivers/clk/st/clkgen-fsyn.c | 8 ++++---- drivers/clk/st/clkgen-pll.c | 12 ++++++------ 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c index 83ccf14..576cd03 100644 --- a/drivers/clk/st/clkgen-fsyn.c +++ b/drivers/clk/st/clkgen-fsyn.c @@ -307,7 +307,7 @@ static const struct clkgen_quadfs_data st_fs660c32_F_416 = { .get_rate = clk_fs660c32_dig_get_rate, }; -static const struct clkgen_quadfs_data st_fs660c32_C_407 = { +static const struct clkgen_quadfs_data st_fs660c32_C = { .nrst_present = true, .nrst = { CLKGEN_FIELD(0x2f0, 0x1, 0), CLKGEN_FIELD(0x2f0, 0x1, 1), @@ -350,7 +350,7 @@ static const struct clkgen_quadfs_data st_fs660c32_C_407 = { .get_rate = clk_fs660c32_dig_get_rate, }; -static const struct clkgen_quadfs_data st_fs660c32_D_407 = { +static const struct clkgen_quadfs_data st_fs660c32_D = { .nrst_present = true, .nrst = { CLKGEN_FIELD(0x2a0, 0x1, 0), CLKGEN_FIELD(0x2a0, 0x1, 1), @@ -1077,11 +1077,11 @@ static const struct of_device_id quadfs_of_match[] = { }, { .compatible = "st,stih407-quadfs660-C", - .data = &st_fs660c32_C_407 + .data = &st_fs660c32_C }, { .compatible = "st,stih407-quadfs660-D", - .data = &st_fs660c32_D_407 + .data = &st_fs660c32_D }, {} }; diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c index 47a38a9..b2a332c 100644 --- a/drivers/clk/st/clkgen-pll.c +++ b/drivers/clk/st/clkgen-pll.c @@ -193,7 +193,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_a0 = { .ops = &stm_pll3200c32_ops, }; -static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = { +static const struct clkgen_pll_data st_pll3200c32_cx_0 = { /* 407 C0 PLL0 */ .pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8), .locked_status = CLKGEN_FIELD(0x2a0, 0x1, 24), @@ -205,7 +205,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = { .ops = &stm_pll3200c32_ops, }; -static const struct clkgen_pll_data st_pll3200c32_407_c0_1 = { +static const struct clkgen_pll_data st_pll3200c32_cx_1 = { /* 407 C0 PLL1 */ .pdn_status = CLKGEN_FIELD(0x2c8, 0x1, 8), .locked_status = CLKGEN_FIELD(0x2c8, 0x1, 24), @@ -624,12 +624,12 @@ static const struct of_device_id c32_pll_of_match[] = { .data = &st_pll3200c32_407_a0, }, { - .compatible = "st,stih407-plls-c32-c0_0", - .data = &st_pll3200c32_407_c0_0, + .compatible = "st,plls-c32-cx_0", + .data = &st_pll3200c32_cx_0, }, { - .compatible = "st,stih407-plls-c32-c0_1", - .data = &st_pll3200c32_407_c0_1, + .compatible = "st,plls-c32-cx_1", + .data = &st_pll3200c32_cx_1, }, { .compatible = "st,stih407-plls-c32-a9",