From patchwork Sat Sep 12 13:02:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ivan T. Ivanov" X-Patchwork-Id: 53511 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f71.google.com (mail-la0-f71.google.com [209.85.215.71]) by patches.linaro.org (Postfix) with ESMTPS id 1BD3E22B26 for ; Sat, 12 Sep 2015 13:03:08 +0000 (UTC) Received: by lamp12 with SMTP id p12sf34080456lam.2 for ; Sat, 12 Sep 2015 06:03:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=Uc+rexXw4f+VHrldEaQF46svs/xJYV4HeKKuO6krRDg=; b=FG4x7blCn1PkcSRv80YJOaedN3J1OYzpPiNwcsYbXXI7PHBxQlphyHy9LCGU9/svkp iU6UUEfPLY6AC5Lm1U/hVcgoRtQAvVoQqurnHGhultdTVv5D3UgLyW6shNVgTDwBsIqW vqBoKHPdU3Hg0rutTWXzUzkGBCTACISv32uuYzJI0yoh4Ibh4CqveblBjyJ1vSGLyAbT bKgjrzwcWccn2Rz8NL3XKrMjoEdyh6YNCVM8dGhQgs7px1uep3xZ/o+KZIjncnfJFezv QTr8jkUUOcmMIAOgsPpb6YZrTljmXyYQsS4Caol50NkI/wgbDyZbP3eHvKtXCemh5uUQ PhKw== X-Gm-Message-State: ALoCoQlNlqNIL9corTs+KaH4b7zb9pz2HAsTgO4dGlk1aTIxszSm0NxNizYGRR3EjJFdtMIvJfQR X-Received: by 10.152.120.233 with SMTP id lf9mr984415lab.2.1442062987095; Sat, 12 Sep 2015 06:03:07 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.243.39 with SMTP id wv7ls407512lac.85.gmail; Sat, 12 Sep 2015 06:03:06 -0700 (PDT) X-Received: by 10.153.7.172 with SMTP id dd12mr3700872lad.25.1442062986876; Sat, 12 Sep 2015 06:03:06 -0700 (PDT) Received: from mail-la0-f53.google.com (mail-la0-f53.google.com. [209.85.215.53]) by mx.google.com with ESMTPS id h11si3232165lbo.151.2015.09.12.06.03.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Sep 2015 06:03:06 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) client-ip=209.85.215.53; Received: by lahg1 with SMTP id g1so32661342lah.1 for ; Sat, 12 Sep 2015 06:03:06 -0700 (PDT) X-Received: by 10.152.18.164 with SMTP id x4mr3738033lad.35.1442062986684; Sat, 12 Sep 2015 06:03:06 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp230568lbq; Sat, 12 Sep 2015 06:03:05 -0700 (PDT) X-Received: by 10.50.3.37 with SMTP id 5mr4276415igz.96.1442062985504; Sat, 12 Sep 2015 06:03:05 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n6si2258314ige.76.2015.09.12.06.03.04; Sat, 12 Sep 2015 06:03:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754840AbbILNCq (ORCPT + 29 others); Sat, 12 Sep 2015 09:02:46 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:34470 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754569AbbILNCi (ORCPT ); Sat, 12 Sep 2015 09:02:38 -0400 Received: by wicfx3 with SMTP id fx3so91208723wic.1 for ; Sat, 12 Sep 2015 06:02:37 -0700 (PDT) X-Received: by 10.180.106.66 with SMTP id gs2mr6464604wib.14.1442062957336; Sat, 12 Sep 2015 06:02:37 -0700 (PDT) Received: from localhost.localdomain ([37.157.136.206]) by smtp.googlemail.com with ESMTPSA id v6sm5464912wjf.13.2015.09.12.06.02.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 12 Sep 2015 06:02:36 -0700 (PDT) From: "Ivan T. Ivanov" To: Andy Gross Cc: Pramod Gurav , David Brown , Greg Kroah-Hartman , Jiri Slaby , Frank Rowand , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-serial@vger.kernel.org Subject: [PATCH 1/7] tty: serial: msm: Add mask value for UART_DM registers Date: Sat, 12 Sep 2015 16:02:08 +0300 Message-Id: <1442062934-13449-2-git-send-email-ivan.ivanov@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1442062934-13449-1-git-send-email-ivan.ivanov@linaro.org> References: <1442062934-13449-1-git-send-email-ivan.ivanov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ivan.ivanov@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Pramod Gurav The bit masks for RFR_LEVEL1 and STALE_TIMEOUT_MSB values in MR1 and IPR registers respectively are different for UART and UART_DM hardware cores. We have been using UART core mask values for these. Add the same for UART_DM core. There is no bit setting as UART_IPR_RXSTALE_LAST for UART_DM core so do it only for UART core. Signed-off-by: Pramod Gurav Reviewed-by: Stephen Boyd Signed-off-by: Ivan T. Ivanov --- drivers/tty/serial/msm_serial.c | 26 ++++++++++++++++++++------ drivers/tty/serial/msm_serial.h | 2 ++ 2 files changed, 22 insertions(+), 6 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c index b73889c8ed4b..d08cfd3e1c3a 100644 --- a/drivers/tty/serial/msm_serial.c +++ b/drivers/tty/serial/msm_serial.c @@ -421,7 +421,7 @@ msm_find_best_baud(struct uart_port *port, unsigned int baud) static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) { - unsigned int rxstale, watermark; + unsigned int rxstale, watermark, mask; struct msm_port *msm_port = UART_TO_MSM(port); const struct msm_baud_map *entry; @@ -432,8 +432,15 @@ static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) /* RX stale watermark */ rxstale = entry->rxstale; watermark = UART_IPR_STALE_LSB & rxstale; - watermark |= UART_IPR_RXSTALE_LAST; - watermark |= UART_IPR_STALE_TIMEOUT_MSB & (rxstale << 2); + if (msm_port->is_uartdm) { + mask = UART_DM_IPR_STALE_TIMEOUT_MSB; + } else { + watermark |= UART_IPR_RXSTALE_LAST; + mask = UART_IPR_STALE_TIMEOUT_MSB; + } + + watermark |= mask & (rxstale << 2); + msm_write(port, watermark, UART_IPR); /* set RX watermark */ @@ -476,7 +483,7 @@ static void msm_init_clock(struct uart_port *port) static int msm_startup(struct uart_port *port) { struct msm_port *msm_port = UART_TO_MSM(port); - unsigned int data, rfr_level; + unsigned int data, rfr_level, mask; int ret; snprintf(msm_port->name, sizeof(msm_port->name), @@ -496,11 +503,18 @@ static int msm_startup(struct uart_port *port) /* set automatic RFR level */ data = msm_read(port, UART_MR1); - data &= ~UART_MR1_AUTO_RFR_LEVEL1; + + if (msm_port->is_uartdm) + mask = UART_DM_MR1_AUTO_RFR_LEVEL1; + else + mask = UART_MR1_AUTO_RFR_LEVEL1; + + data &= ~mask; data &= ~UART_MR1_AUTO_RFR_LEVEL0; - data |= UART_MR1_AUTO_RFR_LEVEL1 & (rfr_level << 2); + data |= mask & (rfr_level << 2); data |= UART_MR1_AUTO_RFR_LEVEL0 & rfr_level; msm_write(port, data, UART_MR1); + return 0; } diff --git a/drivers/tty/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h index 737f69fe7113..5b7722c3938b 100644 --- a/drivers/tty/serial/msm_serial.h +++ b/drivers/tty/serial/msm_serial.h @@ -20,6 +20,7 @@ #define UART_MR1_AUTO_RFR_LEVEL0 0x3F #define UART_MR1_AUTO_RFR_LEVEL1 0x3FF00 +#define UART_DM_MR1_AUTO_RFR_LEVEL1 0xFFFFFF00 #define UART_MR1_RX_RDY_CTL (1 << 7) #define UART_MR1_CTS_CTL (1 << 6) @@ -78,6 +79,7 @@ #define UART_IPR_RXSTALE_LAST 0x20 #define UART_IPR_STALE_LSB 0x1F #define UART_IPR_STALE_TIMEOUT_MSB 0x3FF80 +#define UART_DM_IPR_STALE_TIMEOUT_MSB 0xFFFFFF80 #define UART_IPR 0x0018 #define UART_TFWR 0x001C