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[209.132.180.67]) by mx.google.com with ESMTP id oi6si22986903pbb.195.2014.06.23.11.22.16; Mon, 23 Jun 2014 11:22:16 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753736AbaFWSVz (ORCPT + 27 others); Mon, 23 Jun 2014 14:21:55 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:35046 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753308AbaFWSVx (ORCPT ); Mon, 23 Jun 2014 14:21:53 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s5NIL3wl019789; Mon, 23 Jun 2014 13:21:03 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5NIL3gU006564; Mon, 23 Jun 2014 13:21:03 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Mon, 23 Jun 2014 13:21:03 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5NIL2Bl031983; Mon, 23 Jun 2014 13:21:03 -0500 From: Felipe Balbi To: Benoit Cousson CC: , , Tony Lindgren , , Rajendra Nayak , Nishanth Menon , , , Linux Kernel Mailing List , Linux OMAP Mailing List , Linux ARM Kernel Mailing List , Felipe Balbi Subject: [PATCH v3 1/2] arm: dts: am4372: let boards access all nodes through phandles Date: Mon, 23 Jun 2014 13:20:58 -0500 Message-ID: <1403547659-24558-2-git-send-email-balbi@ti.com> X-Mailer: git-send-email 2.0.0.390.gcb682f8 In-Reply-To: <1403547659-24558-1-git-send-email-balbi@ti.com> References: <1403547659-24558-1-git-send-email-balbi@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: balbi@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , by providing phandles to rtc, wdt, cpu and dispc nodes, boards can access them to add board-specific data. Signed-off-by: Felipe Balbi Tested-by: Franklin Cooper Jr. Tested-by: Tom Rini --- Changes since v1: - added phandles to cpu and dispc arch/arm/boot/dts/am4372.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 49fa596..8d3c163 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -30,7 +30,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu: cpu@0 { compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <0>; @@ -270,7 +270,7 @@ ti,hwmods = "counter_32k"; }; - rtc@44e3e000 { + rtc: rtc@44e3e000 { compatible = "ti,am4372-rtc","ti,da830-rtc"; reg = <0x44e3e000 0x1000>; interrupts = ; interrupts = ; @@ -871,7 +871,7 @@ #size-cells = <1>; ranges; - dispc@4832a400 { + dispc: dispc@4832a400 { compatible = "ti,omap3-dispc"; reg = <0x4832a400 0x400>; interrupts = ;