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[209.132.180.67]) by mx.google.com with ESMTP id xj10si1463498pab.40.2014.03.20.05.59.46; Thu, 20 Mar 2014 05:59:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755769AbaCTM7q (ORCPT + 9 others); Thu, 20 Mar 2014 08:59:46 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:37135 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752354AbaCTM7p (ORCPT ); Thu, 20 Mar 2014 08:59:45 -0400 Received: from cpc11-sgyl31-2-0-cust672.sgyl.cable.virginm.net ([94.175.94.161] helo=debutante.sirena.org.uk) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1WQcZP-0007Ex-Qi; Thu, 20 Mar 2014 12:59:41 +0000 Received: from broonie by debutante.sirena.org.uk with local (Exim 4.82) (envelope-from ) id 1WQcZK-0007hh-DL; Thu, 20 Mar 2014 12:59:34 +0000 From: Mark Brown To: Lorenzo Pieralisi , Catalin Marinas , Mark Rutland Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Brown Date: Thu, 20 Mar 2014 12:59:34 +0000 Message-Id: <1395320374-29576-1-git-send-email-broonie@kernel.org> X-Mailer: git-send-email 1.9.1 X-SA-Exim-Connect-IP: 94.175.94.161 X-SA-Exim-Mail-From: broonie@sirena.org.uk X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mezzanine.sirena.org.uk X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.3.2 Subject: [PATCH] ARM: topology: Make it clear that all CPUs need to be described X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: broonie@kernel.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.182 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Mark Brown The ARMv8 code will reject topologies that omit some CPUs (and it's not clear that it's ever sensible to do so). Update the binding document to make this clear. Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/arm/topology.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/topology.txt b/Documentation/devicetree/bindings/arm/topology.txt index 4aa20e7a424e..1bd5edc225c1 100644 --- a/Documentation/devicetree/bindings/arm/topology.txt +++ b/Documentation/devicetree/bindings/arm/topology.txt @@ -75,9 +75,10 @@ The cpu-map node can only contain three types of child nodes: whose bindings are described in paragraph 3. -The nodes describing the CPU topology (cluster/core/thread) can only be -defined within the cpu-map node. -Any other configuration is consider invalid and therefore must be ignored. +The nodes describing the CPU topology (cluster/core/thread) can only +be defined within the cpu-map node and every core/thread in the system +must be defined within the topology. Any other configuration is +consider invalid and therefore must be ignored. =========================================== 2.1 - cpu-map child nodes naming convention